SVC75P Series – 7.0MM X 5.0MM Ceramic SMD 6 Pad LVPECL VCXO

3D Product View

3D View

Features

• ±20ppm (Frequency Stability) Available
• Ceramic Package
• LVPECL
• Fundamental or PLL (Phase Lock Loop)
• Tape and Reel

Applications

• Fiber Channel
• Gigabit Ethernet
• PCI Express
• SONET

3D Product View

3D View

Features

• ±20ppm (Frequency Stability) Available
• Ceramic Package
• LVPECL
• Fundamental or PLL (Phase Lock Loop)
• Tape and Reel

Applications

• Fiber Channel
• Gigabit Ethernet
• PCI Express
• SONET

Part Number Builder

Please choose your parameters to build a part number:

Part Numbering Guide

svc75p part numbering guide

Electrical Parameters

ParametersUnitsMinTypicalMaxRemarks
Frequency RangeMHz9.5800
Frequency Stability (Includes Initial
Tolerance at 25°C, Frequency Stability
over Operating Temperature, Output Load
Change, Supply Voltage Change, and First
Year Aging at 25°C.)
ppm-20+20See part numbering guide for options.
Operating Temperature°C-40+85See part numbering guide for options.
Storage Temperature°C-55+125
Supply Voltage (VDD) - 2.5V OptionV2.3752.52.625Only available with AT-Cut Fundamental.
Supply Voltage (VDD) - 3.3V OptionV3.1353.33.465Available with AT-Cut Fundamental and PLL.
Current (IDD) - 2.5V OptionmA70
Current (IDD) - 3.3V OptionmA80
Current Voltage (VC) 2.5V OptionV0.22.3
Current Voltage (VC) 3.3V OptionV0.33.0
Pullabilityppm±50±100±150See part numbering guide for options.
Linearity%10
Output Load (LVPECL)Ω5050 Ω into VDD-2.0VDC
Output Logic Levels High (VOH) VVDD-1.025
Output Logic Levels Low (VOL) VVDD-1.620
Rise (TR) and Fall (TF) Timens0.51Measured at 20% to 80% of Waveform.
Symmetry (Duty Cycle)%455055
Output Logic Levels High (VOH) V0.7*VDD
Output Logic Levels Low (VOL) V0.3*VDD
Start-Up Timems10
Phase Jitter (12kHz ~ 20MHz)ps0.41AT-CUT Fundamental
Phase Jitter (12kHz ~ 20MHz)ps35PLL (Phase Lock Loop)

Outline Drawing & Recommended Landed Pattern

All dimensions are in millimeters (mm) unless otherwise noted. Drawings are not to scale.
SVC75P 2d
SVC75P Table
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