ICE40UP5K-UWG30ITR1K

IC FPGA 21 I/O 30WLCSP
Part Description

iCE40 UltraPlus™ Field Programmable Gate Array (FPGA) IC 21 1171456 5280 30-UFBGA, WLCSP

Quantity 1,232 Available (as of May 5, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerLattice Semiconductor Corporation
Manufacturing StatusActive
Manufacturer Standard Lead Time20 Weeks
Datasheet

Specifications & Environmental

Device Package30-WLCSP (2.54x2.12)GradeIndustrialOperating Temperature-40°C – 100°C
Package / Case30-UFBGA, WLCSPNumber of I/O21Voltage1.14 V - 1.26 V
Mounting MethodSurface MountRoHS ComplianceROHS3 CompliantREACH ComplianceREACH Unaffected
Moisture Sensitivity Level1 (Unlimited)Number of LABs/CLBs660Number of Logic Elements/Cells5280
Number of GatesN/AECCNEAR99HTS Code8542.39.0001
QualificationN/ATotal RAM Bits1171456

Overview of ICE40UP5K-UWG30ITR1K – iCE40 UltraPlus FPGA IC, 30-WLCSP

The ICE40UP5K-UWG30ITR1K is an iCE40 UltraPlus Field Programmable Gate Array (FPGA) IC from Lattice Semiconductor Corporation. It integrates 5,280 logic elements and 660 logic blocks with family-level architecture elements such as sysDSP, sysCLOCK PLLs, embedded block RAM and single-port RAM (SPRAM), and on-chip oscillators as documented in the iCE40 UltraPlus family data sheet.

Packaged in a compact 30-WLCSP (2.54 × 2.12 mm) surface-mount package and rated for industrial use, the device targets applications that require moderate logic capacity, on-chip memory, flexible I/O and operation across a wide temperature range.

Key Features

  • Core Capacity — 5,280 logic elements and 660 logic blocks provide the programmable fabric for control, glue logic, and moderate DSP tasks.
  • On‑Chip Memory — Approximately 1.17 Mbits of total embedded RAM available for buffering, state storage, and small local memories (sysMEM Embedded Block RAM and SPRAM referenced in the family data sheet).
  • DSP and Timing — Architecture-level sysDSP blocks and sysCLOCK PLLs are included in the iCE40 UltraPlus family, plus internal oscillators for flexible clocking options.
  • I/O and Interfaces — 21 I/O pins with sysI/O buffer bank support; family documentation includes User I2C IP, User SPI IP, RGB PWM and RGB high‑current drive I/O functions.
  • Power Supply — Operates from a core supply range of 1.14 V to 1.26 V as specified for this device variant.
  • Package and Mounting — Surface-mount 30-UFBGA, WLCSP package (supplier device package: 30-WLCSP, 2.54 × 2.12 mm) for compact board footprints.
  • Industrial Temperature Range — Rated for operation from −40 °C to 100 °C, suitable for industrial environments.
  • Compliance and Reliability — RoHS compliant; family data sheet documents power-on reset behavior, ESD performance, and recommended operating conditions.

Typical Applications

  • Industrial control and I/O aggregation — Moderate logic and embedded memory combined with an industrial temperature range enable interface, glue-logic and sensor aggregation tasks on factory or field equipment.
  • Protocol bridging and embedded peripherals — On-chip logic, SPI/I2C IP blocks and available RAM make the part suitable for protocol conversion, sensor hubs and peripheral bridging.
  • RGB LED and user interface control — Family-level RGB PWM and high-current drive I/O support enable compact RGB LED driving and UI tasks within a small package footprint.
  • Space-constrained designs — The 30-WLCSP package (2.54 × 2.12 mm) and surface-mount mounting suit compact embedded modules and dense PCBs.

Unique Advantages

  • Well-balanced logic and memory — 5,280 logic elements paired with approximately 1.17 Mbits of embedded RAM supports both control logic and local data storage without external memory.
  • Integrated timing and DSP resources — sysCLOCK PLLs and sysDSP blocks (family architecture) simplify clock management and accelerate numeric processing within the FPGA fabric.
  • Compact, industrial-ready package — 30-WLCSP surface-mount package and −40 °C to 100 °C rating enable deployment in space- and temperature-constrained industrial applications.
  • Flexible I/O and peripheral IP — 21 I/Os together with documented User I2C and SPI IP and RGB PWM features support common embedded interfaces and LED control without extensive external logic.
  • Low-voltage core — Core supply operation between 1.14 V and 1.26 V supports designs targeting low-voltage power domains.
  • Documented operational controls — Family data sheet provides detailed information on device configuration, power-on reset, ESD performance and recommended operating conditions for system integration.

Why Choose ICE40UP5K-UWG30ITR1K?

The ICE40UP5K-UWG30ITR1K places a balanced mix of programmable logic, embedded memory and family-level DSP/timing resources into a compact WLCSP package rated for industrial temperatures. Its 5,280 logic elements, approximately 1.17 Mbits of on-chip RAM, and 21 I/Os make it suitable for designs that need programmable control, protocol bridging or LED/UI handling without large external components.

Choose this device when your design requires a small-footprint, industrial-grade FPGA solution with documented architecture building blocks and operating conditions—enabling scalable integration across embedded modules and industrial applications.

Request a quote or submit an inquiry for ICE40UP5K-UWG30ITR1K to receive pricing and availability information.

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