10AT115N2F40E2SGES

IC FPGA 600 I/O 1517FCBGA
Part Description

Arria 10 GT Field Programmable Gate Array (FPGA) IC 600 68857856 1150000 1517-BBGA, FCBGA

Quantity 619 Available (as of October 8, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerIntel
Manufacturing StatusObsolete
Manufacturer Standard Lead TimeContact Us
Datasheet

Specifications & Environmental

Device Package1517-FCBGA (40x40)GradeExtendedOperating Temperature0°C – 100°C
Package / Case1517-BBGA, FCBGANumber of I/O600Voltage870 mV - 930 mV
Mounting MethodSurface MountRoHS ComplianceUnknownREACH ComplianceREACH Unaffected
Moisture Sensitivity Level3 (168 Hours)Number of LABs/CLBs427200Number of Logic Elements/Cells1150000
Number of GatesN/AECCN3A001A7AHTS Code8542.39.0001
QualificationN/ATotal RAM Bits68857856

Overview of 10AT115N2F40E2SGES – Arria 10 GT FPGA, 1,150,000 logic elements, 1517-FCBGA

The 10AT115N2F40E2SGES is an Intel Arria 10 GT Field Programmable Gate Array (FPGA) device in a 1517-FCBGA package. It belongs to the Arria 10 family of 20 nm mid-range FPGAs and SoCs and targets high-performance, power-efficient designs across diverse markets.

With a large logic capacity, extensive embedded memory, high I/O count and support for serial transceiver features described for the Arria 10 GT family, this device is suited for applications in wireless, wireline, broadcast, computing and other demanding systems that require integration and flexibility.

Key Features

  • Logic Capacity 1,150,000 logic elements provide substantial programmable fabric for complex custom logic and compute-intensive functions.
  • Embedded Memory 68,857,856 total RAM bits of on-chip memory to support buffering, large lookup tables, and in-device data storage.
  • I/O and Packaging 600 user I/O pins in a 1517-FCBGA (40×40) surface-mount package (1517-BBGA/FCBGA options noted), enabling dense board-level connectivity.
  • Transceivers and High-speed Interfaces Arria 10 GT family features low-power serial transceivers and support elements for high-speed protocols including 10 Gbps Ethernet and PCIe Gen1/Gen2/Gen3 hard IP as documented for the series.
  • DSP and Timing Variable-precision DSP blocks and advanced clock networks with PLL clock sources support signal processing and precise timing architectures (features described in the Arria 10 device overview).
  • Supply and Thermal Core voltage supply range 870 mV to 930 mV and an operating temperature range of 0 °C to 100 °C; surface-mount package and RoHS compliance for standard commercial and extended-environment boards.
  • SoC and System Integration Arria 10 device documentation includes options for SoC integration and a hard processor system (HPS) in the family, enabling tighter hardware/software integration where applicable.
  • Grade Extended grade offering for deployments requiring broader environmental tolerance within the specified operating range.

Typical Applications

  • Wireless infrastructure — Channel and switch cards in remote radio heads and mobile backhaul equipment where programmable logic and embedded memory accelerate signal processing.
  • Wireline networking — 40G/100G muxponders, transponders and line cards that leverage high-speed serial transceivers and hard IP for PCIe and Ethernet.
  • Broadcast and pro AV — Studio switches, transport and video processing systems that use large on-chip memory and DSP resources for real-time media workflows.
  • Computing and storage — Server acceleration, flash cache controllers and cloud infrastructure elements requiring FPGA-based offload and flexible I/O.
  • Medical and defense — Diagnostic imaging, radar and secure communications where configurable logic and substantial memory enable application-specific processing.

Unique Advantages

  • High logic density: 1,150,000 logic elements allow implementation of large, complex designs on a single device, reducing board-level component count.
  • Large embedded memory: Nearly 69M bits of on-chip RAM supports deep buffering, frame storage and data-tree structures without external memory in some designs.
  • Broad I/O and package options: 600 I/Os and a 1517-FCBGA (40×40) surface-mount package provide flexibility for dense connectivity and modern PCBs.
  • System-level IP support: Arria 10 GT family features such as PCIe hard IP, 10 Gbps Ethernet support and low-power serial transceivers enable integration of high-speed links.
  • Power and clock management: Advanced clock networks and PLL sources described for the family help manage timing across large, multi-clock designs.
  • Extended-grade operation: Rated for 0 °C to 100 °C operation and RoHS compliant, suitable for a wide range of commercial and extended-environment deployments.

Why Choose 10AT115N2F40E2SGES?

The 10AT115N2F40E2SGES sits in the Arria 10 GT family to deliver a balance of high logic density, substantial embedded memory and advanced I/O resources in a compact FCBGA package. It is positioned for designers who need scalable programmable logic with series-level features such as DSP blocks, high-speed serial transceivers and hard IP for common protocols.

This device offers long-term value through its combination of integration, on-chip memory and I/O capacity—helpful for system architects building mid-range FPGA-based solutions across wireless, wireline, broadcast, computing and other markets documented in the Arria 10 device overview.

Request a quote or submit a pricing inquiry to receive availability and lead-time information for the 10AT115N2F40E2SGES Arria 10 GT FPGA.

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