H26M62002JPR

32GB eMMC 5.1 e-NAND commercial
Part Description

eMMC 5.1, 32GB e-NAND, 280MB/s read, dual-die, 153-FBGA

Quantity 107,000 Available (as of October 7, 2026)
Product CategoryeMMC Memory
ManufacturerSK Hynix
Manufacturing StatusActive
Manufacturer Standard Lead TimeContact Us
Datasheet

Specifications & Environmental

Device Package153-BGA (11.5x13mm)Memory FormatFLASHTechnologyFLASH – NAND (MLC)
Memory Size256 GbitAccess TimeN/AGradeCommercial
Clock Frequency200 MHzVoltage3.3VMemory TypeNon-Volatile
Operating Temperature-25°C – 85°CMounting MethodSurface MountMemory InterfaceeMMC 5.1
Memory OrganizationN/AMoisture Sensitivity Level3RoHS ComplianceCompliant
REACH ComplianceREACH UnknownECCNEAR99HTS Code8542.32.00.71

Overview of H26M62002JPR – 32GB eMMC 5.1 SK Hynix e-NAND 153-FBGA (11.5x13mm)

The H26M62002JPR is the 32GB step in SK Hynix’s e-NAND family, reaching that density by stacking two 128Gb dies (DDP) behind a single eMMC 5.1 controller. Despite the dual-die construction it holds the same 11.5 x 13.0 x 0.8mm 153-ball FBGA outline as the 16GB single-die part, so a board can move up in capacity without a mechanical change. User capacity is 31,268,536,320 bytes, equal to 61,071,360 sectors, and the on-chip controller handles wear leveling, ECC, garbage collection, and bad-block management while protecting data through host power-off events.

Storage and performance

The extra die does more than add capacity. Sequential throughput rises to 280MB/s read and 90MB/s write, characterized under HS400 with cache on, so the 32GB grade roughly doubles the write rate of its 16GB sibling. The eMMC 5.1 interface tops out at a 400MB/s bus rate on a 200MHz DDR clock, using 8-bit width and the 1.8V VCCQ option, and steps down to HS200 and legacy timing for hosts that need it. Power arrives on two rails, VCC at 2.7V to 3.6V for the NAND and VCCQ at 1.7V to 1.95V for the controller.

Key Features

  • 32GB dual-die density – two stacked 128Gb dies deliver 29.12GB of usable capacity in a 0.8mm package.
  • Stronger write throughput – 90MB/s sequential write pairs with 280MB/s read for update-heavy and mixed workloads.
  • eMMC 5.1 with HS400 – backward compatible to eMMC 4.5 and 5.0, with command queuing depth of 32, cache, and packed commands.
  • Security and serviceability – RPMB, secure write protection, Secure Erase and Trim, Sanitize, and manual-mode Field Firmware Update.
  • Lifecycle visibility – the Health (Smart) report exposes pre-EOL status and device life-time estimation for proactive maintenance.

Typical Applications

  • Feature-rich embedded platforms – 32GB supports larger operating systems, local databases, and cached media.
  • Automotive infotainment and telematics – capacity for maps and logs on eMMC 5.1 host SoCs.
  • Edge and gateway devices – the higher write rate suits continuous logging and over-the-air update staging.

Why Choose H26M62002JPR?

Pick the H26M62002JPR when a design needs 32GB of managed storage and a stronger write path than the 16GB grade, all on the same footprint and a commercial -25°C to 85°C rating. As with the rest of the family, the 400MB/s number is the HS400 bus rate, the real sequential figures are 280MB/s read and 90MB/s write, and the advertised 32GB maps to 29.12GB of user space once the controller sets aside flash management overhead. Storage without operation spans the wider -40°C to 85°C range.

Contact our team for a H26M62002JPR quote with current pricing, stock, and lead time, and share your annual volume so we can confirm the best sourcing path.

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