EN25QH64A-104FIP(2AC)
| Part Description |
64 Mbit SPI NOR Flash, 104 MHz, 16‑pin SOP |
|---|---|
| Quantity | 1,744 Available (as of May 5, 2026) |
Specifications & Environmental
| Device Package | 16-pin SOP 300mil | Memory Format | NOR Flash | Technology | SPI NOR Flash | ||
|---|---|---|---|---|---|---|---|
| Memory Size | 64 Mbit | Access Time | 8 ns | Grade | Industrial | ||
| Clock Frequency | 104 MHz | Voltage | 2.5V | Memory Type | Non-Volatile | ||
| Operating Temperature | -40°C – 85°C | Write Cycle Time Word Page | 3 ms | Packaging | 16-pin SOP 300mil | ||
| Mounting Method | Surface Mount | Memory Interface | Parallel | Memory Organization | 8M x 8 | ||
| Moisture Sensitivity Level | 3 | RoHS Compliance | Compliant | REACH Compliance | REACH Unknown | ||
| Qualification | N/A | ECCN | EAR99 | HTS Code | 8542.32.00.71 |
Overview of EN25QH64A-104FIP(2AC) – 64 Mbit SPI NOR Flash, 104 MHz, 16‑pin SOP
The EN25QH64A-104FIP(2AC) is a 64 Mbit serial NOR Flash memory from ESMT, designed for high-performance code and data storage in embedded systems. It implements an SPI serial architecture with support for Standard, Dual and Quad SPI modes and a maximum clock rate of 104 MHz, enabling fast reads and flexible interface options.
With uniform 4-Kbyte sectors, industry-range operating temperatures and low-power modes, this device targets industrial embedded applications that require reliable non-volatile storage, block-level erase/program control and long data retention.
Key Features
- Memory Capacity & Organization — 64 Mbit (8,192 KByte) organized as 32,768 pages with 256 bytes per programmable page and 2048 uniform 4-Kbyte sectors for granular erase and program operations.
- Serial SPI Interface — SPI compatible with Mode 0 and Mode 3; supports Standard, Dual and Quad SPI (CLK, CS#, DI, DO and DQ₂/DQ₃ signals) with configurable dummy cycles.
- High-Speed Operation — 104 MHz clock rate for Standard, Dual and Quad operations, delivering equivalent Quad throughput up to 416 MHz (104 MHz × 4) when using Quad read instructions.
- Program and Erase Performance — Typical page program time 0.5 ms; sector erase ~40 ms; half-block erase ~200 ms; block erase ~300 ms; chip erase ~32 seconds. Page program supports 1–256 byte programming.
- Low Power — Typical active current around 5 mA and typical power-down current of 1 µA to support power-sensitive designs.
- Reliability & Data Retention — Minimum 100K program/erase cycles per sector or block and data retention specified at 20 years.
- Security & Protection — Software and hardware write protection options, write suspend/resume, lockable 3×512 byte OTP sector and unique ID read capability for system-level protection and identification.
- Package & Temperature — Available in a 16‑pin SOP 300 mil package; industrial temperature range specified from -40° C to +85° C. Device packages are RoHS compliant.
Typical Applications
- Embedded Firmware Storage — Store boot code, firmware images and patchable subroutines with sector-level protection to update specific modules without affecting the rest of memory.
- Industrial Control — Retain configuration, calibration data and application code in industrial environments requiring -40° C to +85° C operation.
- Consumer & IoT Devices — High-speed SPI and Quad read support for fast code execution and data access in connected devices and user interfaces.
Unique Advantages
- Flexible SPI Modes: Standard, Dual and Quad SPI support lets designers trade pin count for throughput and use the same device across different interface requirements.
- Granular Memory Management: Uniform 4-Kbyte sector architecture and multiple block sizes enable precise erase/program operations and simpler code update strategies.
- High Throughput at 104 MHz: Fast clocking for Standard, Dual and Quad operations reduces read latency and accelerates code fetch and data access.
- Low-Power Standby: Sub-microamp power-down current helps minimize energy draw in battery-assisted or power-constrained systems.
- Industrial Temperature Range: Specified -40° C to +85° C operation for use in demanding environments.
- Durability and Retention: 100K program/erase cycle endurance per sector or block and 20-year data retention support long-term field deployments.
Why Choose EN25QH64A-104FIP(2AC)?
The EN25QH64A-104FIP(2AC) combines high-speed SPI operation, flexible Standard/Dual/Quad interface modes and a uniform sector architecture to provide a controllable, reliable non-volatile memory solution for embedded designs. Its low-power modes, solid program/erase performance and long-term data retention make it suitable for industrial and embedded applications that require robust firmware and data storage.
Engineers developing systems that need granular erase control, secure update mechanisms and wide temperature operation will find this device appropriate for scalable deployments where longevity and predictable behavior are required.
Request a quote or submit a purchase inquiry to get pricing and availability for EN25QH64A-104FIP(2AC).
Date Founded: 1998
Headquarters: Hsinchu Science Park, Hsinchu, Taiwan
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