EN25QX256A-104HIP(2S)
| Part Description |
256 Mbit SPI NOR Flash, 104 MHz, Industrial |
|---|---|
| Quantity | 557 Available (as of May 5, 2026) |
Specifications & Environmental
| Device Package | 8-pin SOP 200mil | Memory Format | NOR Flash | Technology | SPI NOR Flash | ||
|---|---|---|---|---|---|---|---|
| Memory Size | 256 Mbit | Access Time | 8 ns | Grade | Industrial | ||
| Clock Frequency | 104 MHz | Voltage | 2.5V | Memory Type | Non-Volatile | ||
| Operating Temperature | -40°C – 85°C | Write Cycle Time Word Page | 3 ms | Packaging | 8-pin SOP 200mil | ||
| Mounting Method | Surface Mount | Memory Interface | Parallel | Memory Organization | 32M x 8 | ||
| Moisture Sensitivity Level | 3 | RoHS Compliance | Compliant | REACH Compliance | REACH Unknown | ||
| Qualification | N/A | ECCN | EAR99 | HTS Code | 8542.32.00.71 |
Overview of EN25QX256A-104HIP(2S) – 256 Mbit SPI NOR Flash, 104 MHz, Industrial
The EN25QX256A-104HIP(2S) is a 256 Mbit serial NOR flash memory in a compact 8-pin SOP 200mil package, designed for industrial-temperature use. Based on a serial SPI architecture, it delivers high-speed read performance and flexible I/O modes suitable for code storage, firmware update storage, and general non-volatile data logging in embedded systems.
With a 104 MHz maximum clock rate for Fast Read operations, uniform 4 KB sectors, and hardware/software write protection features, this device targets industrial applications that require reliable non-volatile storage with long data retention and robust program/erase endurance.
Key Features
- Memory Capacity & Organization — 256 Mbit (32M × 8) organization with 131,072 programmable pages and 256 bytes per page, providing large, addressable non-volatile storage.
- Serial SPI Architecture — SPI-compatible serial interface supporting Standard, Dual and Quad I/O modes with SPI Mode 0 and Mode 3 compatibility for flexible system integration.
- High-Speed Read — 104 MHz clock rate for Single/Dual/Quad I/O Fast Read; the series also documents support for up to 133 MHz Quad I/O Fast Read under 3.0–3.6 V operation.
- Uniform Sector Architecture — 8,192 sectors of 4 KB, plus 1,024 blocks of 32 KB and 512 blocks of 64 KB, allowing fine-grained erase and update operations.
- Program & Erase Performance — Typical page program time 0.5 ms and sector erase time 40 ms, with larger block and chip erase timings defined for batch operations.
- Endurance & Retention — Minimum 100K program/erase cycles per sector or block and 20 years data retention, supporting long-lived deployments.
- Power & Low-Power Modes — Typical active current around 7 mA and typical power-down current around 1 μA for energy-conscious designs.
- Hardware & Software Protection — WP# pin plus software protection mechanisms enable selective write protection and the ability to lock/unlock sectors as needed.
- Package & Temperature — Available in an 8-pin SOP 200mil surface-mount package and rated for industrial operating range of −40 °C to 85 °C.
- Standards & Discoverability — Supports Serial Flash Discoverable Parameters (SFDP) signature and Read Unique ID Number for device identification and system verification.
- Compliance — RoHS-compliant, lead-free package options.
Typical Applications
- Embedded Firmware Storage — Store boot code and firmware images with uniform 4 KB sectors to support in-field updates and secure region protection.
- Industrial Control — Non-volatile configuration and logging memory for industrial controllers and instrumentation operating across −40 °C to 85 °C.
- Consumer & IoT Devices — Code and data storage for connected devices that benefit from SPI interface flexibility and low-power standby modes.
- Secure Identification — Use Read Unique ID and lockable OTP sectors to implement device identity and small secure storage regions.
Unique Advantages
- Flexible I/O Modes: Support for Standard, Dual and Quad SPI I/O enables designers to trade off pin count versus throughput without changing memory architecture.
- Granular Erase Control: Uniform 4 KB sectors plus larger block sizes let systems erase only what they need, reducing wear and accelerating updates.
- Industrial Reliability: Industrial temperature rating and 100K program/erase cycle minimum provide predictable lifetime characteristics for long-term deployments.
- Low Power Standby: Typical 1 μA power-down current helps minimize energy use in battery-powered or always-on systems.
- Identifiable & Lockable Regions: SFDP support, unique ID, and lockable OTP sectors assist in secure provisioning and device management.
- Compact Surface-Mount Package: 8-pin SOP 200mil body supports small PCB footprints while retaining robust pinout options for HOLD# and WP# signals.
Why Choose EN25QX256A-104HIP(2S)?
The EN25QX256A-104HIP(2S) combines a high-capacity 256 Mbit serial NOR architecture with flexible SPI I/O modes and industry-grade temperature capability, making it well suited for embedded systems that require dependable non-volatile storage and in-field update capability. Its combination of fast read clocks, granular sector architecture, and hardware/software protection features supports application designs focused on reliability, maintainability, and low power.
Engineers can rely on defined program/erase timings, long endurance, and a compact 8-pin SOP package to simplify BOM choices and PCB layout while preserving scalability for future designs that may require higher throughput or secure identification features.
Request a quote or submit an inquiry to receive pricing, availability, and integration support for the EN25QX256A-104HIP(2S).
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