EN25SX128A-104HIP(2P)
| Part Description |
128 Mbit SPI NOR Flash (Industrial) |
|---|---|
| Quantity | 1,749 Available (as of May 5, 2026) |
Specifications & Environmental
| Device Package | 8-pin SOP 200mil | Memory Format | NOR Flash | Technology | SPI NOR Flash | ||
|---|---|---|---|---|---|---|---|
| Memory Size | 128 Mbit | Access Time | 8 ns | Grade | Industrial | ||
| Clock Frequency | 104 MHz | Voltage | 2.5V | Memory Type | Non-Volatile | ||
| Operating Temperature | -40°C – 85°C | Write Cycle Time Word Page | 3 ms | Packaging | 8-pin SOP 200mil | ||
| Mounting Method | Surface Mount | Memory Interface | Parallel | Memory Organization | 16M x 8 | ||
| Moisture Sensitivity Level | 3 | RoHS Compliance | Compliant | REACH Compliance | REACH Unknown | ||
| Qualification | N/A | ECCN | EAR99 | HTS Code | 8542.32.00.71 |
Overview of EN25SX128A-104HIP(2P) – 128 Mbit SPI NOR Flash (Industrial)
The EN25SX128A-104HIP(2P) is a 128 Mbit serial SPI NOR Flash memory device designed for reliable non-volatile code and data storage. It implements a serial interface architecture with support for Standard, Dual and Quad SPI I/O and a 104 MHz fast read clock rate for high-throughput read operations.
Targeted at industrial applications, the device combines granular erase/program capability, hardware and software write protection, and extended endurance and retention characteristics to support firmware storage, in-field updates and protected data segments in temperature-critical systems.
Key Features
- Memory & Organization — 128 Mbit capacity (16,384 KByte / 65,536 pages) with 256 bytes per programmable page and 256-byte page program capability.
- Interface & Performance — Serial SPI architecture compatible with Mode 0 and Mode 3. Supports Standard, Dual and Quad SPI, with a 104 MHz clock rate for Single/Dual/Quad I/O Fast Read.
- Voltage & Power — Single power supply operation with full voltage range 1.65–1.95 V. Low power consumption: typical active current 4.5 mA and typical power-down current 0.1 µA.
- Uniform Sector Architecture & Erase — 4,096 uniform 4-Kbyte sectors, 512 blocks of 32-Kbyte and 256 blocks of 64-Kbyte; individual sector or block erase supported.
- Program/Erase Performance — Typical page program time 0.5 ms; sector erase 40 ms typical; half-block erase 200 ms typical; block erase 300 ms typical; chip erase 60 seconds typical. Write suspend and resume supported.
- Data Integrity & Endurance — Minimum 100K program/erase cycles per sector or block and >20-year data retention.
- Protection & Security — Software and hardware write protection, WP# pin to enable/disable protection, lockable 3×512-byte OTP security sector, and Read Unique ID support.
- Standards & Discoverability — Supports Serial Flash Discoverable Parameters (SFDP) signature for device parameter discovery.
- Package & Temperature — Available in 8‑lead SOP 200 mil body width (and other package options in the series); industrial temperature range (−40 °C to 85 °C).
Typical Applications
- Firmware and Field Updates — Stores executable firmware and supports secure, granular updates by allowing individual sectors/blocks to be unprotected and modified while keeping other regions protected.
- Industrial Control & Instrumentation — Industrial temperature range and robust erase/program endurance make the device suitable for control systems and embedded instrumentation.
- Protected Code and Data Storage — Hardware and software write protection plus lockable OTP sectors enable secure storage of critical code, configuration and small secure data regions.
Unique Advantages
- Multi-mode SPI Flexibility: Standard, Dual and Quad SPI support lets designers scale read throughput without changing the memory family.
- High Read Throughput: 104 MHz fast read capability provides predictable, higher-performance reads for code-execution and data access.
- Granular Erase & Protection: Uniform 4-Kbyte sectors and block-level protection enable targeted updates and reduce erase overhead for firmware maintenance.
- Low Power Operation: Typical active current of 4.5 mA and ultra-low power-down current (0.1 µA) help minimize energy use in battery-assisted or low-power systems.
- Durable & Long-Lived Storage: Specified minimum 100K program/erase cycles and over 20 years of data retention support long service life in deployed systems.
- Industrial Temperature Capability: Operation across −40 °C to 85 °C supports deployment in temperature-challenging environments.
Why Choose EN25SX128A-104HIP(2P)?
The EN25SX128A-104HIP(2P) positions itself as a reliable SPI NOR Flash option for embedded and industrial designs that require durable non-volatile storage, secure update mechanisms and flexible SPI performance modes. Its combination of 128 Mbit capacity, 104 MHz Fast Read, uniform sector architecture and protection features helps streamline firmware management and secure data storage in temperature-sensitive applications.
Engineers specifying this device gain a predictable program/erase performance profile, low-power operation and industry-oriented packaging, making it suitable for designs that demand both robustness and manageable system-level integration.
If you would like a quote or have questions about availability, submit a request to receive pricing and lead-time information for EN25SX128A-104HIP(2P).
Date Founded: 1998
Headquarters: Hsinchu Science Park, Hsinchu, Taiwan
Employees: 400+
Revenue: $377.8 Million
Certifications and Memberships: N/A