EN35SXR256A-104HIP(2PC)
| Part Description |
256 Mbit SPI NOR Serial Flash (Industrial, 8‑pin SOP) |
|---|---|
| Quantity | 1,190 Available (as of May 5, 2026) |
Specifications & Environmental
| Device Package | 8-pin SOP 200mil | Memory Format | DRAM | Technology | SPI NOR Flash | ||
|---|---|---|---|---|---|---|---|
| Memory Size | 256 Mbit | Access Time | 8 ns | Grade | Industrial | ||
| Clock Frequency | 104 MHz | Voltage | 2.5V | Memory Type | Non-Volatile | ||
| Operating Temperature | -40°C – 85°C | Write Cycle Time Word Page | 500 µs | Packaging | 8-pin SOP 200mil | ||
| Mounting Method | Surface Mount | Memory Interface | Parallel | Memory Organization | 32M x 8 | ||
| Moisture Sensitivity Level | 3 | RoHS Compliance | Compliant | REACH Compliance | REACH Unknown | ||
| Qualification | N/A | ECCN | EAR99 | HTS Code | 8542.32.00.71 |
Overview of EN35SXR256A-104HIP(2PC) – 256 Mbit SPI NOR Serial Flash (Industrial, 8‑pin SOP)
The EN35SXR256A-104HIP(2PC) is a 256 Mbit serial NOR Flash memory device designed for industrial embedded systems that require non-volatile code and data storage. It implements a Serial Peripheral Interface (SPI) architecture with Standard, Dual and Quad I/O modes, delivering high-performance read and program/erase operations.
With uniform 4-Kbyte sectors, flexible sector/block erase, hardware/software write protection and industrial temperature range, this device targets firmware storage, field-updatable code segments and robust data retention needs in industrial and embedded applications.
Key Features
- Core & Capacity 256 M-bit density organized as 32M × 8 (32,768 KByte) with 131,072 pages and 256 bytes per programmable page for fine-grained programming.
- Interface & Performance SPI serial interface supporting Standard, Dual and Quad SPI. Fast read clock up to 104 MHz for Single/Dual/Quad I/O and up to 133 MHz for Quad I/O fast read.
- Memory Organization Uniform 4-Kbyte sector architecture (8,192 sectors), plus block and page structures: 1,024 blocks of 32-Kbyte and 512 blocks of 64-Kbyte for flexible erase granularity.
- Program/Erase Speed High performance program/erase: typical page program time 0.5 ms, sector erase time 40 ms, half-block 200 ms, block erase 300 ms, chip erase 120 s.
- Endurance & Retention Minimum 100K program/erase cycles per sector or block with typical data retention of 20 years.
- Protection & Security Software and hardware write protection, default Quad Enable (QE=1), lockable 3×512-byte OTP security sector, Read Unique ID and Replay‑Protected Monotonic Counter (RPMC).
- Power & Low Power Single power supply operation with low power consumption: typical active current 12 mA and typical power-down current 1 μA.
- Addressing & Compatibility Supports 3-byte and 4-byte addressing mode switch and Serial Flash Discoverable Parameters (SFDP) signature.
- Package & Temperature Available in an 8-pin SOP 200 mil body width, surface-mount package; industrial operating range (−40 °C to 85 °C).
- Compliance All Pb-free packages are RoHS compliant.
Typical Applications
- Industrial controllers Non-volatile firmware and configuration storage with sector-level protection and high endurance for field updates.
- Embedded systems & IoT devices Code and data storage requiring compact package, low power standby, and fast SPI read performance for boot and runtime code execution.
- Networking & communications equipment Boot code and parameter storage where fast read throughput and robust erase/program cycles support reliable field operation.
- Secure storage segments Lockable OTP sectors, unique ID and RPMC provide mechanisms for device identity and replay-protected counters in secure applications.
Unique Advantages
- Flexible erase granularity: Uniform 4-Kbyte sectors and multiple block sizes enable precise updates and reduced erase overhead during firmware patches.
- Multi-mode SPI performance: Standard, Dual and Quad SPI with up to 133 MHz Quad read capability reduces read latency for critical boot and execution code.
- Robust lifetime and retention: Designed for a minimum of 100K program/erase cycles and typical 20-year data retention for long-term deployments.
- Integrated protection features: Hardware WP# and software write protection plus lockable OTP sector help safeguard code and sensitive data in-system.
- Industrial temperature range: Specified −40 °C to 85 °C operation for deployment in temperature-variable industrial environments.
Why Choose EN35SXR256A-104HIP(2PC)?
The EN35SXR256A-104HIP(2PC) balances high-density non-volatile storage with performance-focused SPI read modes and practical program/erase speeds for embedded and industrial designs. Its uniform sector architecture, protection features and long endurance make it suitable for systems that need reliable field updates and long-term data retention.
This part is well suited to engineers and procurement teams building industrial controllers, communication equipment or embedded devices that require a compact SOP package, low-power standby, and robust flash management features backed by documented program/erase and endurance specifications.
Request a quote or submit an inquiry to evaluate EN35SXR256A-104HIP(2PC) for your next design or production run.
Date Founded: 1998
Headquarters: Hsinchu Science Park, Hsinchu, Taiwan
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