LCMXO1200E-5TN144C
| Part Description |
MachXO Field Programmable Gate Array (FPGA) IC 113 9421 1200 144-LQFP |
|---|---|
| Quantity | 304 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Lattice Semiconductor Corporation |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 20 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | 144-TQFP (20x20) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 144-LQFP | Number of I/O | 113 | Voltage | 1.14 V - 1.26 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | ROHS3 Compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 150 | Number of Logic Elements/Cells | 1200 | ||
| Number of Gates | N/A | ECCN | EAR99 | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 9421 |
Overview of LCMXO1200E-5TN144C – MachXO Field Programmable Gate Array (FPGA) IC 113 9421 1200 144-LQFP
The LCMXO1200E-5TN144C is a MachXO family non-volatile FPGA from Lattice Semiconductor, delivered in a 144-pin LQFP package. It combines instant-on non-volatile logic with reconfigurable SRAM-based logic, making it suitable for glue logic, bus bridging/interfacing, power-up control and general control-logic tasks in commercial applications.
This device provides 1200 logic elements, 113 I/Os and approximately 9.4 Kbits of on-chip RAM, along with single-chip configuration (no external configuration memory required) for compact, fast-boot designs that require field reprogramming and low standby current options.
Key Features
- Non-volatile, instant-on architecture Single-chip non-volatile configuration that powers up in microseconds and requires no external configuration memory.
- Reconfigurability and in-field updates SRAM-based logic can be reconfigured in milliseconds; supports background programming and TransFR™ in-field reconfiguration for updates while the system operates.
- Logic resources 1200 logic elements for implementing glue logic, control functions and interface bridging.
- On-chip memory Approximately 9.4 Kbits of on-chip RAM for small FIFOs, state storage and buffering.
- I/O and interfacing 113 I/Os in the 144-LQFP package; flexible I/O buffer support described in the MachXO family includes LVCMOS, LVTTL and high-speed differential standards per family specifications.
- Clocking and timing Family-level support includes up to one analog PLL for clock multiply/divide and phase shifting (MachXO family specification for LCMXO1200).
- Low-power and sleep mode Sleep mode capability from the MachXO family enables significant static current reduction (up to 100× reduction in static current as described for the family).
- Commercial operating range and packaging Commercial grade device with operating temperature 0 °C to 85 °C, supplied in a 144-LQFP (20 × 20 mm) surface-mount package; RoHS compliant.
- JTAG and system support In-system programming via JTAG with support for background programming of non-volatile memory (family-level feature).
Typical Applications
- Glue Logic Replace discrete glue logic with compact, reconfigurable logic elements for board-level signal conditioning and control.
- Bus Bridging and Interfacing Implement bus translators and protocol interfacing using available I/Os and programmable I/O buffers.
- Power-up and System Control Use non-volatile instant-on capability for deterministic power-up sequencing and system supervisory functions.
- General Control Logic Integrate state machines, control paths and small data buffers within a single-chip solution to reduce BOM and board area.
Unique Advantages
- Instant system availability: Non-volatile configuration delivers microsecond-class power-up for fast-boot systems.
- Reduced BOM and board complexity: Single-chip configuration removes the need for external configuration memory and simplifies system design.
- Field-upgradeable: TransFR and background programming support in-field logic updates without removing the device.
- Low-standby operation: Sleep mode capability can reduce static current dramatically for power-sensitive applications.
- Balanced I/O-to-logic ratio: 113 I/Os paired with 1200 logic elements enable flexible interfacing while supporting moderate logic density.
- Commercial-grade robustness: 0 °C to 85 °C operating range and RoHS-compliant packaging suitable for a wide range of commercial designs.
Why Choose LCMXO1200E-5TN144C?
The LCMXO1200E-5TN144C offers a practical blend of non-volatile instant-on behavior, reconfigurable logic, and flexible I/O in a compact 144-LQFP package. With 1200 logic elements, roughly 9.4 Kbits of on-chip RAM and 113 I/Os, it targets designers looking to replace discrete logic and accelerate system boot while retaining the ability to update logic in the field.
Backed by Lattice Semiconductor’s MachXO family architecture and family-level features such as JTAG programming, PLL support and flexible I/O buffer options, this device is well suited to commercial embedded and control applications where fast start-up, low BOM and reconfigurability matter.
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