EN25S64A-104HIP(2SC)
| Part Description |
64 M-bit SPI NOR Flash (Industrial) |
|---|---|
| Quantity | 553 Available (as of May 5, 2026) |
Specifications & Environmental
| Device Package | 8-pin SOP 200mil | Memory Format | NOR Flash | Technology | SPI NOR Flash | ||
|---|---|---|---|---|---|---|---|
| Memory Size | 64 Mbit | Access Time | 8 ns | Grade | Industrial | ||
| Clock Frequency | 104 MHz | Voltage | 2.5V | Memory Type | Non-Volatile | ||
| Operating Temperature | -40°C – 85°C | Write Cycle Time Word Page | 3 ms | Packaging | 8-pin SOP 200mil | ||
| Mounting Method | Surface Mount | Memory Interface | Parallel | Memory Organization | 8M x 8 | ||
| Moisture Sensitivity Level | 3 | RoHS Compliance | Compliant | REACH Compliance | REACH Unknown | ||
| Qualification | N/A | ECCN | EAR99 | HTS Code | 8542.32.00.71 |
Overview of EN25S64A-104HIP(2SC) – 64 M-bit SPI NOR Flash (Industrial)
The EN25S64A-104HIP(2SC) is a 64 M-bit serial SPI NOR Flash memory device from ESMT designed for reliable non-volatile code and data storage in industrial applications. Built on an SPI serial interface architecture, the device supports Standard, Dual and Quad SPI modes and fast read operation up to 104 MHz for responsive system boot and code execution.
This device targets embedded and industrial designs that require low-power operation, flexible protection mechanisms and field-updatable memory. It combines uniform sector architecture, fast program/erase performance and industrial temperature range for robust long-term storage.
Key Features
- Memory — 64 M-bit (8,192 KByte) density with 32,768 pages and 256 bytes per programmable page for granular data and code storage.
- Interface — SPI compatible Serial Interface supporting Standard, Dual and Quad SPI modes (CLK, CS#, DI/DO, DQ₂/DQ₃) and SPI Modes 0 and 3 for flexible system integration.
- High Performance Read — Fast read capability up to 104 MHz in Standard and Dual SPI; configurable dummy cycles to tune throughput versus latency.
- Program & Erase — Typical page program time 0.5 ms; sector erase 40 ms typical; half-block and block erase times of 200 ms and 300 ms typical respectively; full chip erase typical 32 seconds.
- Power — Low-power operation with typical active current around 3.5 mA and typical power-down current of 1 µA to support energy-conscious designs.
- Protection & Security — Software and hardware write protection, WP# pin support, lockable 512-byte OTP security sector and Read Unique ID for device identification.
- Reliability — Minimum 100K program/erase endurance per sector and 20-year data retention for long-term reliability.
- Memory Architecture — Uniform sector architecture with 2,048 × 4-Kbyte sectors, 256 × 32-Kbyte blocks and 128 × 64-Kbyte blocks enabling fine-grained erase and update.
- Package & Temperature — Available in 8-pin SOP 200mil package (surface mount) and rated for industrial temperature range (–40 °C to 85 °C). RoHS compliant.
Typical Applications
- Embedded firmware storage — Fast 104 MHz read and page program/erase characteristics enable quick boot and reliable firmware updates in embedded controllers.
- Industrial control — Industrial temperature rating (–40 °C to 85 °C) and robust endurance support long-term program and data retention in automation and control systems.
- Field upgrade and fail-safe systems — Sector-level erase and software/hardware write protection allow targeted updates and protection of critical code regions during field firmware updates.
- Communications and networking equipment — High read throughput and multi-I/O SPI modes (Dual/Quad) improve image and code transfer rates for devices requiring frequent reads.
Unique Advantages
- Fast serial reads at 104 MHz — Reduces boot and read latency for time-sensitive applications.
- Flexible SPI modes — Standard, Dual and Quad operation provide designers with options to balance pin usage and throughput.
- Fine-grained memory control — 4 KB uniform sectors and multiple block sizes enable targeted erase/program for efficient in-field updates and minimal wear.
- Low-power standby — µA-level power-down current supports battery-backed and low-power systems.
- Industrial-grade endurance and retention — 100K program/erase cycles and 20-year data retention give confidence for long-life deployments.
- Hardware and software protection — Multiple protection mechanisms (WP# pin, software protection, OTP lock) help secure critical code and data.
Why Choose EN25S64A-104HIP(2SC)?
The EN25S64A-104HIP(2SC) delivers a balanced combination of high-speed SPI read performance, robust program/erase capabilities and industrial-grade reliability. Its support for Standard, Dual and Quad SPI modes, configurable dummy cycles and a 104 MHz fast-read option make it suitable for embedded systems that need responsive code access and efficient field updates.
With uniform sector architecture, hardware/software protection features and package options including an 8-pin SOP 200mil surface-mount body, this device is well suited to designers seeking a compact, low-power serial Flash solution for industrial and embedded applications that require long-term data retention and strong endurance characteristics.
Request a quote or submit an inquiry to get pricing, lead time and ordering information for EN25S64A-104HIP(2SC).
Date Founded: 1998
Headquarters: Hsinchu Science Park, Hsinchu, Taiwan
Employees: 400+
Revenue: $377.8 Million
Certifications and Memberships: N/A