EN25S64A-104HIP
| Part Description |
64 M-bit SPI NOR Flash (Industrial Grade) |
|---|---|
| Quantity | 1,562 Available (as of May 6, 2026) |
Specifications & Environmental
| Device Package | 8-pin SOP 200mil | Memory Format | NOR Flash | Technology | SPI NOR Flash | ||
|---|---|---|---|---|---|---|---|
| Memory Size | 64 Mbit | Access Time | 7.5 ns | Grade | Industrial | ||
| Clock Frequency | 104 MHz | Voltage | 2.5V | Memory Type | Non-Volatile | ||
| Operating Temperature | -40°C – 85°C | Write Cycle Time Word Page | 3 ms | Packaging | 8-pin SOP 200mil | ||
| Mounting Method | Surface Mount | Memory Interface | Parallel | Memory Organization | 512K x 8 | ||
| Moisture Sensitivity Level | 3 | RoHS Compliance | Compliant | REACH Compliance | REACH Unknown | ||
| Qualification | N/A | ECCN | EAR99 | HTS Code | 8542.32.00.71 |
Overview of EN25S64A-104HIP – 64 M-bit SPI NOR Flash (Industrial Grade)
The EN25S64A-104HIP is a 64 M-bit SPI NOR non-volatile flash memory in the EN25S64A family, delivered in an industrial temperature grade. Built on a serial SPI architecture, it supports Standard, Dual and Quad SPI modes and is optimized for high-speed code and data storage in embedded systems that require block-level erase and robust write protection.
Key value propositions include high read throughput (up to 104 MHz fast read), flexible sector/block erase granularity, and hardware/software protection features that simplify firmware update and secure storage use cases in industrial applications.
Key Features
- Memory Capacity & Organization 67.11 Mbit organized as 512K × 8 with 256-byte programmable pages and 32,768 pages total as documented for the EN25S64A family.
- High-speed Read Performance Fast read operation up to 104 MHz (Standard/Dual SPI) with configurable dummy cycles; normal read supported at 83 MHz. Typical access time is 7.5 ns.
- Program & Erase Performance Typical page program time 0.5 ms (datasheet typical); sector erase, half-block and block erase times listed as 40 ms, 200 ms and 300 ms typical respectively; chip erase time typical 32 seconds. Product specification lists write cycle time (word/page) at 3 ms.
- Interface Options Serial SPI compatible interface supporting Mode 0 and Mode 3, with Standard, Dual and Quad SPI command sets and dedicated control pins (CLK, CS#, DI/DO, WP#, HOLD#/RESET#).
- Protection & Security Uniform sector architecture with 4 KB sectors, support for software and hardware write protection, WP# pin control, software/hardware reset, and a lockable 512-byte OTP security sector.
- Endurance & Retention Minimum 100K program/erase cycles per sector or block and typical data retention time of 20 years.
- Power & Low Power Modes Low active and standby currents reported for the series (typical active current ~3.5 mA, typical power-down current ~1 μA) to help minimize system power draw.
- Package & Temperature Available in an 8-pin SOP 200mil surface-mount package; industrial operating temperature range of −40 °C to 85 °C. RoHS compliant.
Typical Applications
- Firmware and Boot Storage Block-erasable sectors and page-program capability make the device suitable for storing boot code, firmware images and in-field updates.
- Industrial Control Systems Industrial temperature rating and non-volatile storage characteristics support control firmware, configuration and logging in factory and process automation equipment.
- Networking & Communications Equipment High-speed SPI read modes and quad I/O options enable fast fetch of code and configuration data in routers, switches and edge devices.
- Embedded Appliances & Consumer Devices Compact 8-pin packaging and low power standby behavior suit compact embedded controllers and user-interface modules that require persistent storage.
Unique Advantages
- Flexible SPI Modes: Standard, Dual and Quad SPI support lets system designers balance performance and pin count according to application needs.
- Fine-Grained Erase Control: 4 KB uniform sectors and larger block erase options allow targeted updates and reduce wear on unaffected code/data regions.
- Built-in Protection Mechanisms: Software and hardware write protection, plus a lockable OTP sector, provide layered protection for critical code and data.
- Industrial Reliability: Rated for −40 °C to 85 °C and a minimum of 100K erase/program cycles, the device is suited to long-life embedded applications.
- Compact, Surface-Mount Packaging: An 8-pin SOP 200mil package enables small-footprint board designs while maintaining access to dedicated control pins.
Why Choose EN25S64A-104HIP?
The EN25S64A-104HIP combines the EN25S64A series’ high-speed SPI read capabilities with flexible program/erase granularity and hardware/software protection features required for reliable firmware and data storage in industrial and embedded systems. Its multi-mode SPI interface and small 8-pin package provide designers with performance and integration options for a wide range of board-level implementations.
This part is appropriate for designs that require durable non-volatile storage, controlled update paths, and a compact footprint—offering a balance of performance, protection and industrial-temperature operation for long-term deployment.
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Date Founded: 1998
Headquarters: Hsinchu Science Park, Hsinchu, Taiwan
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