EN25S80B-104HIP(2S)
| Part Description |
8 Mbit SPI NOR Flash (Industrial) |
|---|---|
| Quantity | 883 Available (as of May 5, 2026) |
Specifications & Environmental
| Device Package | 8-pin SOP 200mil | Memory Format | NOR Flash | Technology | SPI NOR Flash | ||
|---|---|---|---|---|---|---|---|
| Memory Size | 8 Mbit | Access Time | 8 ns | Grade | Industrial | ||
| Clock Frequency | 104 MHz | Voltage | 2.5V | Memory Type | Non-Volatile | ||
| Operating Temperature | -40°C – 85°C | Write Cycle Time Word Page | 3 ms | Packaging | 8-pin SOP 200mil | ||
| Mounting Method | Surface Mount | Memory Interface | Parallel | Memory Organization | 1M x 8 | ||
| Moisture Sensitivity Level | 3 | RoHS Compliance | Compliant | REACH Compliance | REACH Unknown | ||
| Qualification | N/A | ECCN | EAR99 | HTS Code | 8542.32.00.71 |
Overview of EN25S80B-104HIP(2S) – 8 Mbit SPI NOR Flash (Industrial)
The EN25S80B-104HIP(2S) is an 8 Mbit serial SPI NOR flash memory designed for industrial embedded storage. It uses a serial SPI architecture with support for Standard, Dual and Quad SPI modes and is targeted at applications that require non-volatile code and data storage with sector-level erase and robust write protection.
Key value propositions include high-speed serial reads up to 104 MHz, uniform 4-Kbyte sectors for flexible erase granularity, and industrial temperature operation for reliable performance in demanding environments.
Key Features
- Memory Capacity & Organization — 8 Mbit serial flash organized as 1M × 8 with 1,024 KByte total and 4,096 programmable pages (256 bytes per page).
- Serial SPI Interface — Supports Standard, Dual and Quad SPI (CLK, CS#, DI/DO, DQ pins and control signals) with configurable dummy cycles and SPI modes 0 and 3.
- High-Speed Read — Fast read operation up to 104 MHz (fast read mode with 1 dummy byte in standard and dual SPI; quad SPI supports 104 MHz with 3 dummy bytes).
- Program & Erase Performance — Typical page program time 0.5 ms; sector erase (4K) typical 40 ms; half-block and block erase times and full chip erase available for flexibility in memory management.
- Uniform Sector Architecture — 256 × 4-Kbyte sectors, 32 × 32-Kbyte blocks and 16 × 64-Kbyte blocks enabling single-sector or block erase operations.
- Write Protection & Security — Software and hardware write protection, WP# pin support, lockable 3 × 512-byte OTP security sector, and Read Unique ID support.
- Endurance & Retention — Minimum 100K program/erase cycles per sector and 20 years data retention specified.
- Power & Low Power Modes — Single power supply operation with low active and deep power-down currents (low µA range specified in datasheet).
- Package & Temperature — Available in 8-pin SOP 200 mil package; industrial grade operation from −40 °C to 85 °C; RoHS compliant.
- Standards & Discoverability — Supports Serial Flash Discoverable Parameters (SFDP) signature for interoperability.
Typical Applications
- Embedded Firmware Storage — Non-volatile storage for boot code and firmware images where sector-level erase and in-system updates are required.
- IoT & Edge Devices — Program and data storage for connected sensors and controllers operating across industrial temperature ranges.
- Industrial Control — Reliable code and configuration storage in PLCs, motor controllers and instrumentation that need write-protect features and long retention.
- Consumer & Title Interface Modules — Storage for user interface resources and parameters that benefit from fast read performance and quad-SPI bandwidth.
Unique Advantages
- Flexible Read Modes: Standard, dual and quad SPI support with configurable dummy cycles enables designers to trade off latency and throughput per application needs.
- Granular Erase Control: Uniform 4-Kbyte sectors plus multiple block sizes let systems erase only what they need, reducing downtime and write wear.
- Robust Protection: Combined hardware (WP#) and software write-protect mechanisms plus lockable OTP sectors help safeguard critical code and data.
- Industrial Reliability: Specified for −40 °C to 85 °C and a minimum 100K P/E cycles per sector, supporting long-term field operation and data retention.
- Compact, Industry-Standard Package: 8-pin SOP 200 mil packaging simplifies PCB layout for space-constrained embedded designs while maintaining standard assembly footprint.
Why Choose EN25S80B-104HIP(2S)?
The EN25S80B-104HIP(2S) delivers a balanced combination of high-speed SPI read performance, sector-level erase flexibility and industrial temperature capability—making it suitable for embedded systems that require reliable non-volatile storage. Its versatile SPI modes, write-protection features and SFDP support simplify integration across a range of designs.
This device is a good fit for engineers and procurement teams designing firmware storage, field-updatable systems, and industrial controllers where endurance, retention and predictable erase/program behavior are essential.
Request a quote or submit an inquiry to receive pricing and availability for EN25S80B-104HIP(2S) and to discuss lead times or volume requirements.
Date Founded: 1998
Headquarters: Hsinchu Science Park, Hsinchu, Taiwan
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