EN35QYR512A-104HIP(2UC)
| Part Description |
512 Mbit SPI NOR Flash (104 MHz, Industrial) |
|---|---|
| Quantity | 1,257 Available (as of May 4, 2026) |
Specifications & Environmental
| Device Package | 8-pin SOP 200mil | Memory Format | DRAM | Technology | SPI NOR Flash | ||
|---|---|---|---|---|---|---|---|
| Memory Size | 512 Mbit | Access Time | 8 ns | Grade | Industrial | ||
| Clock Frequency | 104 MHz | Voltage | 2.5V | Memory Type | Non-Volatile | ||
| Operating Temperature | -40°C – 85°C | Write Cycle Time Word Page | 500 µs | Packaging | 8-pin SOP 200mil | ||
| Mounting Method | Surface Mount | Memory Interface | Parallel | Memory Organization | 2M x 8 | ||
| Moisture Sensitivity Level | 3 | RoHS Compliance | Compliant | REACH Compliance | REACH Unknown | ||
| Qualification | N/A | ECCN | EAR99 | HTS Code | 8542.32.00.71 |
Overview of EN35QYR512A-104HIP(2UC) – 512 Mbit SPI NOR Flash (104 MHz, Industrial)
The EN35QYR512A-104HIP(2UC) is a 512 Mbit serial SPI NOR flash memory device optimized for high-performance non-volatile code and data storage. It implements a serial interface architecture with Single, Dual and Quad SPI modes and supports fast read operations up to a 104 MHz clock rate.
Designed for industrial temperature operation, the device combines high-density storage, configurable protection schemes and fast program/erase performance to support firmware storage, field updates and long-term data retention in embedded systems.
Key Features
- Density & Organization — 512 Mbit (65,536 KByte) capacity organized into 262,144 pages with 256 bytes per programmable page and 4 Kbyte uniform sectors.
- Serial SPI Interface — SPI-compatible architecture supporting Standard, Dual and Quad SPI (Mode 0 and Mode 3) with Single/Dual/Quad I/O Fast Read operations.
- High-Speed Read — Supports a 104 MHz clock rate for fast read throughput in Single, Dual and Quad modes.
- Power — Single power-supply operation with full voltage range 2.7–3.6 V. Typical active current 24 mA and typical power-down current 2 μA.
- Program & Erase Performance — Typical page program time 0.5 ms; sector erase time 40 ms; half-block and block erase times and full-chip erase timing provided for flexible memory management.
- Endurance & Retention — Minimum 100K program/erase cycles per sector and more than 20-year data retention.
- Security & Identification — Lockable 3×512 byte OTP security sector, Read Unique ID, and Replay-Protected Monotonic Counter (RPMC).
- Addressing & Compatibility — Supports 3-byte and 4-byte address modes and Serial Flash Discoverable Parameters (SFDP) signature for interoperability.
- Protection — Software and hardware write-protect capabilities allow whole or partial memory protection and fine-grained sector/block protection control.
- Package & Temperature — Available in an 8-pin SOP 200 mil package (industrial temperature range −40 °C to 85 °C). RoHS-compliant.
Typical Applications
- Industrial Control — Secure firmware storage and field update management enabled by uniform 4 Kbyte sectors and software/hardware protection.
- Embedded Systems — High-density non-volatile storage for code, configuration and data logging with long data retention and 100K endurance cycles.
- Communications & Networking — Fast read performance (104 MHz) and Quad I/O support for host boot and lookup table storage in networked devices.
Unique Advantages
- Flexible SPI Modes: Standard, Dual and Quad SPI support provides scalable read/write performance without changing the underlying memory footprint.
- Uniform Sector Architecture: 4 Kbyte uniform sectors simplify firmware update and partial erase operations, reducing software complexity.
- Robust Data Integrity: Lockable OTP, RPMC and read unique ID features add layers of security and identity management for protected data.
- Industrial-Grade Operation: Extended −40 °C to 85 °C temperature range and RoHS compliance support deployment in industrial environments.
- Proven Endurance & Retention: Minimum 100K program/erase cycles and greater than 20-year data retention help ensure long-term reliability.
Why Choose EN35QYR512A-104HIP(2UC)?
The EN35QYR512A-104HIP(2UC) positions itself as a high-density, industrial-grade SPI NOR flash solution that balances high-speed read performance with robust protection and long-term data retention. Its support for Single/Dual/Quad SPI, configurable address modes and SFDP compatibility make it suitable for embedded designs that require scalable performance and interoperability.
This device is well suited to engineers and designers building industrial controllers, embedded systems and communication equipment that demand reliable non-volatile storage, secure firmware update capability and predictable program/erase behavior over long product lifecycles.
Request a quote or submit an inquiry to receive pricing, availability and order support for EN35QYR512A-104HIP(2UC).
Date Founded: 1998
Headquarters: Hsinchu Science Park, Hsinchu, Taiwan
Employees: 400+
Revenue: $377.8 Million
Certifications and Memberships: N/A