EN35SXR128A-104FIP(2PC)
| Part Description |
128 Mbit SPI NOR Flash, 16‑pin SOP (Industrial) |
|---|---|
| Quantity | 481 Available (as of May 4, 2026) |
Specifications & Environmental
| Device Package | 16-pin SOP 300mil | Memory Format | DRAM | Technology | SPI NOR Flash | ||
|---|---|---|---|---|---|---|---|
| Memory Size | 128 Mbit | Access Time | 8 ns | Grade | Industrial | ||
| Clock Frequency | 104 MHz | Voltage | 2.5V | Memory Type | Non-Volatile | ||
| Operating Temperature | -40°C – 85°C | Write Cycle Time Word Page | 500 µs | Packaging | 16-pin SOP 300mil | ||
| Mounting Method | Surface Mount | Memory Interface | Parallel | Memory Organization | 16M x 8 | ||
| Moisture Sensitivity Level | 3 | RoHS Compliance | Compliant | REACH Compliance | REACH Unknown | ||
| Qualification | N/A | ECCN | EAR99 | HTS Code | 8542.32.00.71 |
Overview of EN35SXR128A-104FIP(2PC) – 128 Mbit SPI NOR Flash, 16‑pin SOP (Industrial)
The EN35SXR128A-104FIP(2PC) from ESMT is a 128 Mbit serial NOR Flash memory organized as 16M × 8 for non-volatile code and data storage. It implements a SPI serial interface with support for Standard, Dual and Quad I/O modes and a 104 MHz fast-read clock to support high-throughput read operations.
Designed for industrial temperature operation, the device combines uniform-sector erase architecture, hardware and software write protection, and security features for applications that require reliable field updates, code storage, and secure non-volatile data retention.
Key Features
- Memory Capacity & Organization 128 M-bit device organized as 16M × 8 with 256‑byte programmable pages and 65,536 pages total.
- Serial SPI Interface Supports Standard, Dual and Quad SPI I/O (CLK, CS#, DI/DO, DQ₂, DQ₃) with SPI Mode 0 and Mode 3 compatibility.
- High‑speed Read Fast read operation up to a 104 MHz clock rate for Single/Dual/Quad I/O Fast Read.
- Uniform Sector Architecture 4,096 uniform 4‑Kbyte sectors (512 × 32‑Kbyte blocks; 256 × 64‑Kbyte blocks) enabling individual sector or block erase operations.
- Program & Erase Performance Typical page program time 0.5 ms (500 µs); sector erase typical 40 ms; half‑block and block erase and chip erase times documented for system planning.
- Power Single power supply operation across the device's specified voltage range with low active current (typical 8 mA) and ultra-low power down current (typical 0.1 μA).
- Security & Protection Hardware and software write protection, lockable 3×512‑byte OTP security sector, Read Unique ID Number, and a Replay‑Protected Monotonic Counter (RPMC).
- Reliability Endurance of a minimum 100K program/erase cycles per sector and data retention typically specified at 20 years.
- Package & Temperature Surface mount 16‑pin SOP (300 mil) package with industrial operating temperature range −40 °C to 85 °C.
Typical Applications
- Firmware and Boot Storage Stores boot code and firmware images where fast read performance and reliable non‑volatile retention are required.
- Field Updates & Code Patching Supports selective block/sector protection and individual sector erase so systems can safely patch or update code modules in the field.
- Configuration & Parameter Storage Secure storage for device configuration, calibration tables, and non‑volatile parameters with OTP and protection options.
- Embedded System Code Shadowing Provides a serial Flash target for shadowing application code or storing secondary images for safe firmware rollbacks.
Unique Advantages
- Flexible I/O Modes: Standard, Dual and Quad SPI support enables designers to scale read bandwidth to match system requirements.
- Fine‑Grained Erase Control: Uniform 4 KB sectors allow selective erasure and updates without requiring large block or full chip erase cycles.
- Fast Read Throughput: 104 MHz fast‑read support delivers higher read performance for boot and execute‑in‑place use cases.
- Industrial Temperature Range: Specified operation from −40 °C to 85 °C for robust performance in industrial environments.
- Low Power Standby: Very low power down current (≈0.1 μA typical) supports energy‑sensitive designs that require long idle periods.
- Security & Longevity: OTP, unique ID, RPMC and a minimum 100K P/E cycles plus 20‑year data retention help ensure long‑term reliability and secure operation.
Why Choose EN35SXR128A-104FIP(2PC)?
The EN35SXR128A-104FIP(2PC) offers a balanced combination of high‑speed SPI read capability, granular sector Erase/program management, and security features in a compact 16‑pin SOP package tailored for industrial ambient ranges. Its Serial NOR architecture, multi‑I/O options (Standard/Dual/Quad), and documented program/erase characteristics make it suitable for embedded designs that require reliable non‑volatile storage and field update capability.
Engineers specifying this device will benefit from predictable endurance and retention figures, low standby power, and hardware/software protection mechanisms that simplify integration into systems requiring secure firmware and parameter storage.
Request a quote or submit an inquiry to receive pricing, availability, and support for EN35SXR128A-104FIP(2PC) for your next design.
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