AM62A74AUMHAAMBR

2 TOPS VISION SOC WITH RGB-IR IS
Part Description

ARM® Cortex®-A53 Microprocessor IC Sitara™ 4 Core, 64-Bit 1.4GHz 484-FCBGA (18x18)

Quantity 824 Available (as of October 8, 2026)
Product CategoryMicroprocessors
Part SeriesSitara AM62A
ManufacturerTexas Instruments
Manufacturing StatusActive
Manufacturer Standard Lead Time12 Weeks
Datasheet

Specifications & Environmental

Co-Processors/DSPARM® Cortex®-R5FCore ProcessorARM® Cortex®-A53Device Package484-FCBGA (18x18)
Display & Interface ControllersMIPI-CSIECCNN/AEthernet10/100/1000Mbps (2)
GradeIndustrialGraphics AccelerationYesHTS CodeN/A
Moisture Sensitivity LevelN/AMounting MethodSurface MountMounting TypeSurface Mount
Number of Cores/Bus Width4 Core, 64-BitOperating Temperature-40°C ~ 105°C (TJ)Package / Case484-BFBGA, FCBGA
RAM ControllersDDR4, LPDDR4REACH ComplianceREACH UnknownRoHS ComplianceUnknown
Security FeaturesAES, ARM TZ, Cryptography, DRBG, ECC, MD5, PKA, Random Number Generator, RSA, Secure Boot, SHA2, SMSSpeed1.4GHzSupplier Device Package484-FCBGA (18×18)
USBUSB 2.0 (2)Voltage – I/O1.1V, 1.2V, 1.8V, 3.3V

Overview of AM62A74AUMHAAMBR – 2 TOPS VISION SOC WITH RGB-IR IS

The AM62A74AUMHAAMBR is a Sitara AM62A series vision system-on-chip featuring a quad Arm® Cortex®-A53 cluster up to 1.4 GHz and integrated vision and multimedia accelerators. It combines high-performance application cores, Cortex-R5F microcontroller subsystems, a C7x deep-learning accelerator and dedicated Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP) capabilities.

Designed for embedded vision, industrial and automotive applications, the device targets camera, imaging and edge inference use cases by delivering integrated ISP support for RGB-IR sensors, multi-megapixel video pipelines, hardware video codecs and on-chip security and safety features.

Key Features

  • Core Subsystem  Quad 64-bit Arm® Cortex®-A53 cluster up to 1.4 GHz with 512 KB L2 shared cache (SECDED ECC); individual A53 cores include 32 KB L1 I-cache and 32 KB L1 D-cache.
  • Real-time MCU Subsystems  Dual Arm® Cortex®-R5F cores up to 800 MHz for MCU-level control and device management, each with dedicated caches and TCMs.
  • Deep Learning & DSP  C7x floating-point accelerator (up to 40 GFLOPS) and Matrix Multiply Accelerator (MMA) capable of up to 2 TOPS (8b) at 1.0 GHz for on-device inference.
  • Vision & ISP  Vision Processing Accelerators with a 315 MPixel/s ISP supporting up to 5 MP @ 60 fps, 12-bit RGB-IR input, up to 16-bit RAW, WDR, lens distortion correction and multi-scalar support.
  • Multimedia  Video encoder/decoder supporting HEVC (H.265) and H.264 profiles, with up to 4K UHD (3840 × 2160) support and Motion JPEG encode at high pixel rates.
  • Memory  DDR subsystem supporting LPDDR4 and DDR with a 32-bit data bus with inline ECC; up to 2.29 MB of on-chip RAM including L2 SRAM and multiple OCRAM banks with SECDED ECC.
  • Interfaces  MIPI CSI-2 receiver (up to 4 lanes, 2.5 Gbps per lane), DPI 24-bit RGB display interface (up to 2048×1080 @60 fps), dual Gigabit Ethernet ports, and dual USB 2.0 ports.
  • Security & Reliability  Hardware security features including AES, ARM TrustZone, Secure Boot, RSA, ECC, SHA2, PKA, DRBG and a hardware random number generator; memory ECC and CRC protections across subsystems.
  • Safety & Qualification  AEC-Q100 qualification is listed and documentation supports functional-safety targeted development.
  • Package & Temperature  484-FCBGA (18×18) surface-mount package; industrial operating temperature range of −40 °C to 105 °C.

Typical Applications

  • Vision and Camera Systems  High-resolution camera nodes and multi-sensor imaging systems leveraging the ISP, MIPI CSI-2 input and on-chip video encode/decode.
  • Industrial Machine Vision  Automated inspection and vision-guided control using the VPAC ISP, lens distortion correction and high-throughput image pipelines.
  • Automotive Imaging  Camera and vision subsystems in automotive applications, supported by AEC-Q100 qualification and functional-safety targeted features.
  • Edge AI and Inference  On-device neural network acceleration and matrix operations using the C7x DLA and MMA for local inference workloads.

Unique Advantages

  • Integrated vision pipeline: ISP and VPAC accelerators with RGB-IR support simplify sensor interfacing and image pre-processing for camera-focused designs.
  • On-chip inference capability: C7x and MMA deliver dedicated compute for deep learning workloads without requiring external accelerators.
  • Comprehensive multimedia support: Hardware video codecs and high pixel-rate JPEG support enable bandwidth-efficient streaming and recording up to 4K UHD.
  • System-level safety and security: SECDED ECC across memories, hardware cryptography and Secure Boot reduce risk for safety-targeted and secure applications.
  • Robust connectivity: Multi-lane MIPI CSI-2, dual Gigabit Ethernet and USB 2.0 provide flexible I/O for networked and camera-heavy systems.
  • Industrial operating range and qualification: Surface-mount 484-FCBGA package rated for −40 °C to 105 °C and AEC-Q100 qualification support deployment in demanding environments.

Why Choose AM62A74AUMHAAMBR?

The AM62A74AUMHAAMBR combines a high-performance quad Cortex-A53 application cluster with dedicated MCU subsystems, a C7x deep-learning accelerator and a powerful ISP/VPAC suite to deliver a compact, integrated platform for embedded vision and multimedia designs. Its mix of on-chip compute, memory with ECC and extensive I/O makes it suitable for camera appliances, industrial vision, automotive imaging and edge inference applications.

With AEC-Q100 qualification, hardware security primitives and functional-safety targeted documentation, this Sitara device provides a scalable, robust foundation for developers seeking integrated vision processing, secure boot and on-device AI capabilities within a single 484-FCBGA package.

Request a quote or submit an inquiry to obtain pricing and availability for AM62A74AUMHAAMBR.

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