IDT79RC32V334-150BBG
| Part Description |
MIPS-II Microprocessor IC Interprise™ 1 Core, 32-Bit 150MHz 256-PBGA (17x17) |
|---|---|
| Quantity | 111 Available (as of October 8, 2026) |
| Product Category | Microprocessors |
|---|---|
| Part Series | IDT79RC32V334 |
| Manufacturer | Renesas Electronics Corporation |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Core Processor | MIPS-II | Device Package | 256-PBGA (17x17) | Mounting Type | Surface Mount | ||
|---|---|---|---|---|---|---|---|
| Number of Cores/Bus Width | 1 Core, 32-Bit | Operating Temperature | 0°C – 70°C | Package / Case | Tray | ||
| Speed | 150MHz | Voltage | 3.3V |
Overview of IDT79RC32V334-150BBG – IC MPU INTERPRISE 150MHZ 256PBGA
The IDT79RC32V334-150BBG is a single-core, 32-bit Interprise™ microprocessor implementing the MIPS-II architecture and rated for 150 MHz operation. It is designed for embedded applications that require a balanced combination of CPU performance and integrated system peripherals.
With on-chip memory management, caches, SDRAM control and a broad set of I/O and bus interfaces, this device targets embedded and communications designs where integration, predictable performance and a compact 256-ball PBGA footprint matter.
Key Features
- Core & Performance – MIPS-II 32-bit CPU core operating at up to 150 MHz, single-core configuration suitable for deterministic embedded processing.
- Instruction & MMU – Enhanced MIPS-II ISA with an MMU that includes a 32-page TLB to support virtual memory and operating-system compatibility.
- Caches – 8 kB instruction cache (2-way set associative) and 2 kB data cache (2-way set associative) with per-line cache locking and programmable cache write policies.
- Memory Controllers – Integrated SDRAM controller supporting four non-interleaved banks and up to 512 MB total SDRAM; memory & peripheral controller supports six banks and 8-/16-/32-bit interfaces for Flash, SRAM and other devices.
- High-performance DMA & Bus – Four general-purpose DMA channels with support for scatter/gather, chaining, unaligned and burst transfers; 32-bit PCI interface (PCI rev. 2.2 compatible) supporting up to 66 MHz operation.
- Serial & UART Interfaces – Two 16550-compatible UARTs (baud up to 1.5 Mb/s) and an SPI master-mode interface for common serial peripheral control.
- Timers, Interrupts & PIO – Multiple general-purpose 32-bit timers/counters, an interrupt controller for exception management and programmable I/O pins that can act as inputs, outputs or interrupt sources.
- Debug & Development – EJTAG in-circuit emulator interface and JTAG (IEEE 1149.1) support for development and debug workflows.
- Power & I/O Characteristics – 3.3 V core/IO operation with 5 V tolerant I/O signaling.
- Package & Mounting – 256-ball PBGA (17 × 17 mm, 1.0 mm ball pitch) in a surface-mount tray format.
- Operating Range & Compliance – Consumer-grade operating temperature range of 0 °C to 70 °C and RoHS-compliant.
Typical Applications
- Embedded Control Systems – On-board processing and peripheral control in embedded appliances and dedicated controllers leveraging the integrated timers, PIO and memory interfaces.
- Communications & Networking Equipment – Packet processing, serial bridging and control-plane tasks using the MIPS-II core combined with UART, SPI, DMA and PCI interfaces.
- Memory-Intensive Embedded Designs – SDRAM-backed systems and devices that require a built-in SDRAM controller and flexible memory bank support up to 512 MB.
- Custom I/O & Peripherals – Systems requiring tight control of local memory and peripherals through the local bus interface and programmable I/O.
Unique Advantages
- Integrated System Peripherals: Consolidates SDRAM control, PCI, UARTs, SPI, DMA and programmable I/O on-chip to reduce external component count and simplify board design.
- Predictable Embedded Performance: MIPS-II core at 150 MHz with small, lockable caches and an MMU provides deterministic behavior for real-time and OS-based embedded applications.
- Flexible Memory Support: On-chip SDRAM controller and multi-bank memory/peripheral controller support a wide range of memory configurations up to 512 MB, easing system memory design.
- Compact, Surface-Mount Packaging: 256-ball PBGA (17×17 mm) provides a compact footprint for space-constrained boards while maintaining extensive I/O.
- Development & Debug Support: EJTAG and JTAG interfaces facilitate in-circuit emulation and standard debug workflows during development and bring-up.
- 3.3 V Operation with 5 V-Tolerant I/O: Enables integration with common 3.3 V systems and mixed-voltage environments without additional level-shifting for many signals.
Why Choose IDT79RC32V334-150BBG?
The IDT79RC32V334-150BBG positions itself as a balanced, integrated processor for embedded designs that require a MIPS-II core, on-chip memory management and a wide set of peripherals in a compact PBGA package. Its combination of caches, MMU, SDRAM and peripheral controllers reduces off-chip components while delivering a predictable 150 MHz processing capability.
This device is suitable for engineers building communications, control or memory-backed embedded systems who need a single-chip solution that integrates DMA, PCI connectivity, serial interfaces and robust debug support. The RoHS-compliant package and standard operating range make it appropriate for consumer-graded embedded products.
Request a quote or submit an inquiry to receive pricing and availability information for the IDT79RC32V334-150BBG. Our team can provide lead-time and ordering details to support your design schedule.

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Headquarters: Koto City, Tokyo, Japan
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