AT6002A-2AC
| Part Description |
AT6000(LV) Field Programmable Gate Array (FPGA) IC 95 1024 144-LQFP |
|---|---|
| Quantity | 1,002 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Microchip Technology |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 144-LQFP (20x20) | Grade | Commercial | Operating Temperature | 0°C – 70°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 144-LQFP | Number of I/O | 95 | Voltage | 4.75 V - 5.25 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | N/A | Number of Logic Elements/Cells | 1024 | ||
| Number of Gates | 6000 | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A |
Overview of AT6002A-2AC – AT6000(LV) Field Programmable Gate Array (FPGA) IC, 1024 Logic Elements, 95 I/O, 144-LQFP
The AT6002A-2AC is an SRAM-based FPGA from the AT6000(LV) family, optimized for reconfigurable coprocessor and compute‑intensive logic tasks. Its symmetrical 32 × 32 cell architecture delivers 1,024 logic elements (usable gates: 6,000) with independently controlled column clocks and resets to support adaptive hardware and in-system reconfiguration.
Designed for commercial embedded systems, the device is offered in a 144‑LQFP (20 × 20) surface-mount package, operates from a 4.75 V to 5.25 V supply, and is RoHS compliant.
Key Features
- Core Architecture Symmetrical 32 × 32 cell array providing 1,024 logic elements and approximately 6,000 usable gates for implementing compute‑intensive logic and custom functions.
- Registers & Logic Density Up to 1,024 registers available for state storage and pipelined logic implementations.
- High Performance Timing System speeds greater than 100 MHz with flip‑flop toggle rates over 250 MHz. Measured input delays ~1.2 ns / 1.5 ns and output delays ~3.0 ns / 6.0 ns as specified for the family.
- Programmable Clocking Independently controlled column clocks and resets with clock skew under 1 ns across the device to support synchronized, high‑speed designs.
- I/O Flexibility 95 user I/Os with TTL/CMOS input thresholds, open‑collector/tristate options, programmable slew‑rate control, and I/O drive of 16 mA (combinable to 64 mA) for interfacing with a range of peripherals.
- Power Characteristics Low standby currents and typical operating current ranges shown for the series; the AT6002 family reports typical operating current in the range of 15–30 mA, enabling lower-power embedded implementations.
- Package & Mounting 144‑lead LQFP (20 × 20) surface‑mount package suitable for compact board layouts and standard SMT assembly.
- Commercial Temperature Grade Specified for 0 °C to 70 °C operation, matching commercial embedded application requirements.
- Regulatory RoHS compliant.
Typical Applications
- Reconfigurable Coprocessors Use the AT6002A-2AC to offload compute‑intensive tasks and accelerate application-specific algorithms via in‑system reconfiguration.
- Hardware Acceleration Implement cache logic and adaptive hardware to speed processing in signal‑processing and high‑throughput logic paths.
- High‑Speed Control Logic Deploy in control and interface subsystems requiring synchronized clocks and low clock skew across custom logic arrays.
- Prototyping & Custom IP Leverage the device’s programmable fabric and automatic component generator support for rapid prototyping of custom logic macros.
Unique Advantages
- Reconfigurable Performance: System speeds >100 MHz and flip‑flop toggle rates >250 MHz enable responsive, high‑frequency logic implementations.
- Deterministic Timing: Column-level clock and reset control with <1 ns skew supports tightly synchronized designs and predictable timing behavior.
- Flexible I/O Options: Wide I/O feature set (TTL/CMOS thresholds, programmable slew, tristate/open‑collector, multi‑mA drive) simplifies interfacing to diverse peripherals.
- Compact Packaging: 144‑LQFP (20 × 20) surface‑mount footprint balances pin count and board density for embedded designs.
- Commercial‑Grade Reliability: Specified commercial temperature range and RoHS compliance meet standard embedded market requirements.
Why Choose AT6002A-2AC?
The AT6002A-2AC brings a balanced combination of logic density, timing performance, and I/O flexibility in a compact 144‑LQFP package. Its symmetrical cell array and independently controlled column clocks make it well suited for designers building reconfigurable coprocessors, hardware accelerators, and synchronized control logic where low clock skew and predictable timing are important.
For commercial embedded projects that require in‑system reconfiguration, compact packaging, and a clear set of electrical and thermal specifications (4.75–5.25 V supply, 0 °C to 70 °C), the AT6002A-2AC provides a verifiable, specification‑driven FPGA option with RoHS compliance.
Request a quote or submit an inquiry to purchase the AT6002A-2AC for evaluation or production through your preferred distributor.

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