AT6002A-4AC

IC FPGA 95 I/O 144LQFP
Part Description

AT6000(LV) Field Programmable Gate Array (FPGA) IC 95 1024 144-LQFP

Quantity 950 Available (as of May 5, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerMicrochip Technology
Manufacturing StatusObsolete
Manufacturer Standard Lead TimeRFQ
Datasheet

Specifications & Environmental

Device Package144-LQFP (20x20)GradeCommercialOperating Temperature0°C – 70°C
Package / Case144-LQFPNumber of I/O95Voltage4.75 V - 5.25 V
Mounting MethodSurface MountRoHS ComplianceRoHS non-compliantREACH ComplianceREACH Unaffected
Moisture Sensitivity Level3 (168 Hours)Number of LABs/CLBsN/ANumber of Logic Elements/Cells1024
Number of Gates6000ECCN3A991DHTS Code8542.39.0001
QualificationN/A

Overview of AT6002A-4AC – AT6000(LV) Field Programmable Gate Array (FPGA) IC 95 1024 144-LQFP

The AT6002A-4AC is an AT6000(LV) series SRAM-based FPGA from Microchip Technology, designed for reconfigurable coprocessors and compute-intensive logic. Its architecture uses a symmetrical array of small logic cells with a flexible busing network to support adaptive hardware and hardware acceleration.

This device provides 1,024 logic elements (cells), approximately 6,000 usable gates, up to 95 user I/Os in a 144-LQFP (20×20) surface-mount package, and operates from a 4.75 V to 5.25 V supply within a commercial temperature range of 0 °C to 70 °C. The part is RoHS compliant.

Key Features

  • Core architecture – Symmetrical array of identical cells connected by a high-speed busing network, enabling efficient routing and logic placement across the chip.
  • Performance – Series specifications include system speeds greater than 100 MHz and flip-flop toggle rates above 250 MHz; measured input and output delays are listed in the series documentation.
  • Logic resources – Approximately 6,000 usable gates and 1,024 logic elements (cells) with up to 1,024 registers for implementing compute-intensive functions.
  • I/O flexibility – Up to 95 user I/Os that are independently configurable with TTL/CMOS input thresholds, open-collector/tristate outputs, programmable slew-rate control and 16 mA drive per pin (combinable to higher drive).
  • Configuration and design – Supports complete or partial in-system reconfiguration with no loss of data or machine state; design flow supported by a PC- and workstation-based Integrated Development System and reusable custom hard macro generators.
  • Power – Designed for very low-power operation with standby currents reported in the series documentation and typical operating current ranges provided for AT6000 devices.
  • Package and environmental – 144-LQFP (20×20) surface-mount package, RoHS compliant, commercial grade, and rated for 0 °C to 70 °C operating temperature.

Typical Applications

  • Reconfigurable coprocessors – Implement hardware acceleration and offload compute-intensive tasks using the device’s arrayed logic and register resources.
  • Adaptive hardware – Use cache-logic design methods and in-system reconfiguration to implement adaptive or evolving hardware functions without losing machine state.
  • High-speed control and signal processing – Leverage the device’s >100 MHz system speeds and configurable I/O for timing-sensitive control and processing blocks.
  • Embedded system integration – Fit moderate gate-count FPGA capability into a 144-LQFP package for space-constrained board designs with extensive I/O needs.

Unique Advantages

  • Independent column clocking – Independently controlled column clocks and resets with clock skew less than 1 ns across the chip enable precise timing and partitioned clock domains.
  • Compact, dense logic – Approximately 1,024 logic elements and ~6,000 usable gates in a single 144-LQFP package simplify integration of acceleration logic into existing systems.
  • Flexible interface options – Independently configurable I/O with TTL/CMOS thresholds, programmable slew-rate and significant drive capability support diverse external interfaces.
  • In-system reconfiguration – Complete and partial reconfiguration without losing data or machine state supports field updates and adaptive operation.
  • Low-power operation – Series-level standby and operating current characteristics are optimized for low-power embedded use; AT6002 devices document typical operating currents at modest levels.
  • Consistent pinout for migration – AT6000 series devices share consistent pin locations to simplify migration between densities within the family.

Why Choose AT6002A-4AC?

The AT6002A-4AC delivers a balanced combination of moderate gate density, extensive I/O and configurable architecture suitable for reconfigurable coprocessors, hardware acceleration and other compute-intensive embedded designs. Its symmetrical cell array and flexible busing network provide an efficient platform for implementing adaptive hardware and cache-logic strategies.

With a 144-LQFP surface-mount package, 5 V supply support (4.75 V to 5.25 V), commercial temperature rating and RoHS compliance, the AT6002A-4AC is positioned for embedded and consumer-oriented designs that require reliable, reconfigurable logic with a supported development flow.

Request a quote or submit a pricing inquiry to get availability and lead-time information for the AT6002A-4AC.

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