AT6002LV-4AC
| Part Description |
AT6000(LV) Field Programmable Gate Array (FPGA) IC 80 1024 100-TQFP |
|---|---|
| Quantity | 698 Available (as of October 8, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Microchip Technology |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 100-TQFP (14x14) | Grade | Commercial | Operating Temperature | 0°C – 70°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 100-TQFP | Number of I/O | 80 | Voltage | 3.135 V - 3.465 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | N/A | Number of Logic Elements/Cells | 1024 | ||
| Number of Gates | 6000 | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A |
Overview of AT6002LV-4AC – AT6000(LV) Field Programmable Gate Array (FPGA) IC 80 I/O, 1,024 Logic Elements, 100-TQFP
The AT6002LV-4AC is an SRAM-based FPGA from the AT6000(LV) family designed for reconfigurable coprocessor and compute‑intensive logic applications. It combines a symmetrical array architecture of logic elements with a flexible busing network and programmable I/O to support adaptive hardware and hardware acceleration use cases.
Built for mid-range designs, the device offers 1,024 logic element cells (approximately 6,000 usable gates), 80 user I/Os in a 100-TQFP (14 × 14) package, and low-voltage 3.3 V operation within a commercial temperature range.
Key Features
- Core Logic 1,024 logic element cells providing approximately 6,000 usable gates for mid-range FPGA implementations.
- Performance System speeds greater than 100 MHz and flip‑flop toggle rates above 250 MHz. Documented input delays of 1.2 ns / 1.5 ns and output delays of 3.0 ns / 6.0 ns.
- I/O Flexibility 80 user I/Os with independently configurable I/O options (TTL/CMOS input thresholds, open-collector/tristate outputs), programmable slew-rate control and I/O drive of 16 mA (combinable to 64 mA) for varied interface requirements.
- Reconfiguration Supports complete and partial in-system reconfiguration with no loss of data or machine state, enabling adaptive hardware updates in the field.
- Power and Voltage Low-voltage operation with a specified supply range of 3.135 V to 3.465 V. Series-level typical operating currents are documented in the datasheet (series range 15 to 170 mA) and low standby currents are specified.
- Architecture and Routing Symmetrical array of cells surrounded by programmable I/O and a two-tier busing network (local and express buses) for efficient medium- and long-distance communication across the array.
- Package & Mounting 100-TQFP (14 × 14) surface-mount package; commercial grade operation from 0 °C to 70 °C. RoHS compliant.
Typical Applications
- Reconfigurable Coprocessors Implement hardware-accelerated functions and offload compute-intensive tasks using the device’s logic capacity and in-system reconfiguration capability.
- Hardware Acceleration Deploy cache-logic and adaptive hardware blocks to accelerate processing paths in digital systems.
- High-speed Logic Prototyping Validate and iterate mid-range digital designs that require >100 MHz system speeds and flexible I/O control.
- Custom Interface Bridging Use programmable I/O thresholds and configurable drive/slew settings to interface between mixed logic and peripheral standards.
Unique Advantages
- Compact mid-range capacity: Approximately 6,000 usable gates and 1,024 logic elements provide focused resources for moderate-complexity designs without unnecessary overhead.
- Fast internal timing: Documented system speeds greater than 100 MHz and high flip‑flop toggle rates enable responsive logic implementations.
- Flexible I/O control: Independently configurable I/O with programmable thresholds, slew-rate control and combinable drive strengths simplifies interfacing diverse peripherals.
- Field reconfigurability: Complete and partial in-system reconfiguration preserves machine state while enabling updates and adaptive behavior in deployed systems.
- Standard surface-mount package: 100-TQFP (14 × 14) simplifies PCB layout and assembly for volume production.
- Commercial temperature and RoHS compliance: Designed for commercial applications with documented 0 °C to 70 °C operation and RoHS status.
Why Choose AT6002LV-4AC?
The AT6002LV-4AC positions itself as a practical choice for designers needing a reconfigurable, mid-range FPGA with documented performance, flexible I/O and in-system reconfiguration capabilities. Its combination of 1,024 logic elements, 80 user I/Os and 100-TQFP packaging makes it suitable for compute-focused subsystems where adaptive hardware and interface versatility are required.
Backed by the AT6000(LV) series architecture and associated development tools, the device supports iterative design workflows and field updates, helping teams scale functionality without redesigning base hardware.
Request a quote or submit an availability inquiry to receive pricing and lead-time information for the AT6002LV-4AC.

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