DRA726APL2ABCRQ1

IC MPU DRA72X CORTEX-A15 760BGA
Part Description

ARM® Cortex®-A15 Microprocessor IC DRA72x 1 Core, 32-Bit 750MHz 760-FCBGA (23x23)

Quantity 786 Available (as of October 8, 2026)
Product CategoryMicroprocessors
Part SeriesJacinto DRA72x
ManufacturerTexas Instruments
Manufacturing StatusActive
Manufacturer Standard Lead Time26 Weeks
Datasheet

Specifications & Environmental

Co-Processors/DSPARM® Cortex®-M4, BB2D, C66x, GPU, IVACore ProcessorARM® Cortex®-A15Device Package760-FCBGA (23x23)
Display & Interface ControllersHDMI, LCDECCNN/AEthernet10/100Mbps (1), 10/100/1000Mbps (1)
GradeAutomotiveGraphics AccelerationYesHTS CodeN/A
Moisture Sensitivity Level3 (168 Hours)Mounting MethodSurface MountMounting TypeSurface Mount
Number of Cores/Bus Width1 Core, 32-BitOperating Temperature-40°C ~ 125°C (TJ)Package / Case760-BFBGA, FCBGA
QualificationAEC-Q100RAM ControllersDDR3, DDR3LREACH ComplianceREACH Unknown
RoHS ComplianceROHS3 CompliantSATASATASecurity FeaturesCryptography, Debug Security, Device Identity, Isolation Firewalls, Secure Boot, Secure Storage, Software IP Protection
Speed750MHzSupplier Device Package760-FCBGA (23×23)USBUSB 2.0 (2), USB 3.0 (1)
Voltage – I/O1.35V, 1.5V, 1.8V, 3.3V

Overview of DRA726APL2ABCRQ1 – IC MPU DRA72X CORTEX-A15 760BGA

The DRA726APL2ABCRQ1 is an ARM® Cortex®-A15 based microprocessor in the Jacinto DRA72x series, delivering a single 32‑bit application core running at 750 MHz. Designed for infotainment and embedded multimedia systems, it integrates video, graphics and multiple co‑processor subsystems to enable high‑function automotive and consumer designs.

This device combines a Cortex‑A15 application core with visual and DSP engines, comprehensive I/O and memory interfaces, and automotive‑grade qualification, providing a compact, highly integrated platform for HMI, navigation, multimedia playback and related applications.

Key Features

  • Core and Processing  ARM® Cortex®‑A15 application core, single 32‑bit core at 750 MHz, complemented by co‑processors including ARM® Cortex®‑M4, C66x DSP cores, BB2D and IVA subsystems for specialized signal and image processing.
  • Memory and Storage  DDR3/DDR3L external memory controller with support referenced in the datasheet; on‑chip L3 RAM up to 512 KB and external memory support for system expansion. Integrated SATA interface for mass storage connectivity.
  • Graphics and Video  Integrated graphics acceleration with a PowerVR™ SGX544 3D GPU and 2D BB2D accelerator; video processing features include Full‑HD video support, HDMI/DVI encoder and a Video Processing Engine (VPE) plus a Video Input Port (VIP).
  • Connectivity and I/O  Rich peripheral set including SuperSpeed USB 3.0 (1), USB 2.0 (2), dual Ethernet ports (one 10/100, one 10/100/1000), PCIe® lanes, SATA, multiple UART/I2C/McSPI/QSPI/MMC/SD interfaces and HDQ/1‑Wire.
  • Multimedia Peripherals  Display controller with DMA and up to three pipelines, MIPI CSI‑2 camera interface, multiple audio serial ports (McASP) and onboard IVA and IPU subsystems for image and audio processing.
  • Security and System Reliability  Device security features listed in the product data include hardware cryptography accelerators, secure boot, secure storage, device identity and isolation firewalls, plus debug security mechanisms.
  • Automotive Qualification and Temperature Range  Automotive grade with AEC‑Q100 qualification and operating temperature range from -40 °C to 125 °C for demanding environments.
  • Package and Form Factor  760‑pin FCBGA package (23 mm × 23 mm, 0.8 mm pitch) suitable for surface‑mount applications.

Typical Applications

  • Human‑Machine Interface (HMI)  Drives graphical displays, touch UIs and multimedia content for in‑vehicle consoles and control panels.
  • Navigation Systems  Handles map rendering, route guidance and multimedia integration with onboard storage and networked data.
  • Rear‑Seat and In‑Vehicle Entertainment  Supports Full‑HD video playback, multiple video inputs/outputs and audio subsystems for passenger entertainment systems.
  • Digital and Analog Radio  Enables audio decoding and system integration for AM/FM/RDS and digital radio applications.
  • ADAS and System Integration  Acts as an infotainment‑class processor for integration with advanced driver assistance subsystems and Jacinto 6 platforms.

Unique Advantages

  • Highly integrated multimedia subsystem: Combines application core, VPE, GPU, BB2D and IVA subsystems to reduce BOM and simplify multimedia design.
  • Comprehensive connectivity: Multiple high‑speed interfaces including USB 3.0, SATA, PCIe and dual Ethernet ports support diverse peripheral and networking needs.
  • Automotive‑grade robustness: AEC‑Q100 qualification and wide operating temperature range support deployment in automotive environments.
  • Dedicated signal processing engines: C66x DSPs and Cortex‑M4 IPUs provide offload for image, audio and real‑time tasks, improving overall system responsiveness.
  • On‑chip memory and DMA resources: Up to 512 KB of on‑chip L3 RAM and enhanced DMA controllers help optimize data movement and system performance.
  • Compact BGA package: 760‑pin FCBGA (23×23 mm) delivers high pin count in a compact footprint for space‑constrained embedded designs.

Why Choose DRA726APL2ABCRQ1?

The DRA726APL2ABCRQ1 positions itself as a purpose‑built infotainment and embedded multimedia processor combining a Cortex‑A15 application core with dedicated DSPs, rich video/graphics subsystems and extensive I/O. Its blend of processing elements and interfaces enables designers to consolidate functions, reduce external components and streamline system architecture.

With automotive qualification (AEC‑Q100), wide temperature range and a comprehensive set of on‑chip accelerators and peripherals, this device is suited for engineers building robust, scalable infotainment, navigation and multimedia platforms where integration, reliability and deterministic media handling are priorities.

Request a quote or submit an inquiry to purchase the DRA726APL2ABCRQ1 and receive pricing and availability information from our team.

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