FC80960HA40SL2GW
| Part Description |
i960 Microprocessor IC i960 1 Core, 32-Bit 40MHz 208-PQFP |
|---|---|
| Quantity | 867 Available (as of October 8, 2026) |
| Product Category | Microprocessors |
|---|---|
| Part Series | i960 Hx |
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Core Processor | i960 | Device Package | 208-PQFP | ECCN | 3A001A3 | ||
|---|---|---|---|---|---|---|---|
| Grade | Commercial | Graphics Acceleration | No | HTS Code | 8542.31.0001 | ||
| Moisture Sensitivity Level | 5 (48 Hours) | Mounting Method | Surface Mount | Mounting Type | Surface Mount | ||
| Number of Cores/Bus Width | 1 Core, 32-Bit | Operating Temperature | 0°C ~ 85°C (TC) | Package / Case | 208-QFP | ||
| RAM Controllers | DRAM | REACH Compliance | REACH Unknown | RoHS Compliance | RoHS non-compliant | ||
| Speed | 40MHz | Supplier Device Package | 208-PQFP | Voltage – I/O | 3.3V |
Overview of FC80960HA40SL2GW – IC MPU I960 40MHZ 208QFP
The FC80960HA40SL2GW is a single-core, 32-bit i960-series microprocessor in a 208‑pin PQFP package, designed for embedded system applications. At a 40 MHz bus clock the device provides a balanced combination of on-chip processing, memory and system peripherals suitable for control and real-time embedded designs.
Built around the i960 superscalar architecture, the device integrates caches, internal RAM, an FPU and an advanced interrupt/timer subsystem to deliver measurable system integration and deterministic I/O performance in commercial-temperature environments.
Key Features
- Core & Architecture 32-bit superscalar i960 core with load/store architecture. Includes sixteen 32-bit global registers and sixteen 32-bit local registers plus an on‑chip register cache for efficient context handling.
- Performance 40 MHz operating speed; series-level capability to issue up to 150 million instructions per second. External bandwidth at 40 MHz supports up to 160 Mbyte/s.
- Memory & Cache High-performance on‑chip storage with a 16 Kbyte four‑way set‑associative instruction cache, an 8 Kbyte four‑way set‑associative data cache and 2 Kbyte general purpose RAM. Supports DRAM controllers and per‑byte parity generation/checking.
- Floating Point & Coprocessor Integrated floating point unit (FPU) to accelerate arithmetic and DSP-style computations without external coprocessors.
- Interrupts & Timers High-speed interrupt controller supporting up to 240 external interrupts, 31 programmable priorities and a non‑maskable interrupt pin. Dual on‑chip 32‑bit timers with auto-reload and one‑shot modes, plus CLKIN prescaling.
- System Interfaces & Bus 32‑bit demultiplexed burst bus with support for 8/16/32‑bit external bus widths, address pipelining option and a fully programmable wait‑state generator. JTAG support (IEEE 1149.1) for debug and boundary scan.
- Power & I/O 3.3 V supply voltage with 5 V tolerant inputs and TTL‑compatible outputs, enabling flexible interfacing with mixed-voltage peripherals.
- Package & Temperature Range 208‑pin PQFP surface-mount package, commercial grade with an operating temperature range of 0 °C to 85 °C.
Typical Applications
- Embedded control systems — Leverage the 32‑bit core, integrated timers and high interrupt count for deterministic control tasks and device management.
- Real‑time data processing — Use the integrated FPU, caches and on‑chip RAM to accelerate numeric and streaming workloads that require predictable throughput.
- Systems requiring robust memory protection — The guarded memory unit supports user/supervisor read/write/execute controls and per‑byte parity checking for improved runtime protection.
Unique Advantages
- Highly integrated on‑chip resources: Instruction/data caches, general RAM and an integrated FPU reduce external component count and simplify board design.
- Deterministic embedded performance: 40 MHz operation with high external bandwidth and programmable wait states provides repeatable throughput for time‑sensitive tasks.
- Extensive interrupt and timer support: Large external interrupt capacity and dual 32‑bit timers enable responsive event handling and complex scheduling.
- Flexible system interfacing: 5 V tolerant inputs, TTL outputs and support for multiple external bus widths ease integration with a range of peripherals and legacy devices.
- Built‑in system protection and diagnostics: Guarded memory, per‑byte parity and JTAG IEEE 1149.1 support enhance reliability and simplify validation.
Why Choose FC80960HA40SL2GW?
FC80960HA40SL2GW positions itself as a practical, integrated microprocessor choice for embedded designs that need a 32‑bit i960 core, on‑chip caches, an FPU and comprehensive interrupt/timer resources in a single 208‑pin PQFP package. Its 3.3 V I/O, 5 V tolerant inputs and programmable bus features provide flexibility for mixed-voltage and legacy interfaces.
This device is suited to engineers and procurement teams developing commercial‑temperature embedded platforms that require deterministic processing, robust memory protection and reduced BOM through on‑chip integration.
Request a quote or submit a purchase inquiry to receive pricing and availability for FC80960HA40SL2GW.

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