GD80960JA25
| Part Description |
i960 Microprocessor IC i960 1 Core, 32-Bit 25MHz 196-BGA |
|---|---|
| Quantity | 1 Available (as of October 8, 2026) |
| Product Category | Microprocessors |
|---|---|
| Part Series | i960 |
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Core Processor | i960 | Device Package | 196-BGA | ECCN | 3A991A2 | ||
|---|---|---|---|---|---|---|---|
| Grade | Commercial | Graphics Acceleration | No | HTS Code | 8542.31.0001 | ||
| Moisture Sensitivity Level | Not Applicable | Mounting Method | Surface Mount | Mounting Type | Surface Mount | ||
| Number of Cores/Bus Width | 1 Core, 32-Bit | Operating Temperature | 0°C ~ 100°C (TC) | Package / Case | 196-BGA | ||
| REACH Compliance | REACH Unknown | RoHS Compliance | RoHS non-compliant | Speed | 25MHz | ||
| Supplier Device Package | 196-BGA | Voltage – I/O | 3.3V |
Overview of GD80960JA25 – IC MPU I960 25MHZ 196BGA
The GD80960JA25 is a single‑core, 32‑bit i960 microprocessor operating at 25 MHz with a 3.3 V I/O supply. It delivers deterministic instruction throughput with a one‑instruction‑per‑clock execution model and integrated system features targeted at embedded designs.
Designed for embedded microprocessor applications, the device integrates on‑chip memory, cache, timers and a high‑bandwidth bus to simplify system design while providing a compact 196‑ball BGA surface‑mount package and commercial‑grade temperature support.
Key Features
- Core & Performance i960 single‑core, 32‑bit architecture running at 25 MHz with one instruction per clock execution for predictable instruction throughput.
- Memory & Cache On‑chip program and data cache (JA variant program cache 2 KB, direct‑mapped data cache 1 KB) plus 1 KB of on‑chip data RAM for critical variable storage and faster single‑cycle access.
- Bus & Memory Interface 32‑bit multiplexed address/data bus with selectable 8/16/32‑bit bus widths and support for unaligned accesses and byte ordering selection to accommodate varied memory configurations.
- Interrupts & Timers High‑speed interrupt controller with multiple programmable priorities and maskable inputs, plus two independent 32‑bit on‑chip timers with clock prescaling (1, 2, 4 or 8) for precise event timing.
- System Integration On‑chip stack frame cache with multiple register sets available for rapid context save/restore; IEEE 1149.1 (JTAG) boundary‑scan compatibility for board‑level test and debug.
- IO & Compatibility 3.3 V supply with 5 V tolerant inputs and TTL‑compatible outputs, enabling compatibility with mixed‑voltage system interfaces.
- Power & Thermal Halt mode for reduced power draw and commercial operating temperature range of 0 °C to 100 °C.
- Package & Mounting 196‑ball mini plastic BGA (surface mount) package for compact board footprint and reliable soldered connections; RoHS compliant.
Typical Applications
- Embedded control systems — Single‑core 32‑bit processing and integrated timers make the device suitable for general embedded control and processing tasks.
- Industrial and commercial equipment — 3.3 V I/O, 5 V tolerant inputs and a commercial temperature range support deployment in a range of industrial and commercial products.
- Board‑level test and development — JTAG boundary‑scan compatibility and on‑chip debug/test support simplify development and manufacturing test flows.
Unique Advantages
- Deterministic execution: One‑instruction‑per‑clock core supports predictable timing for control and real‑time tasks.
- Integrated memory resources: On‑chip caches and 1 KB data RAM reduce external memory dependency and improve access latency for critical code and data.
- Flexible bus configuration: Selectable bus widths and support for unaligned accesses simplify interfacing to diverse memory and peripheral architectures.
- Robust system features: Programmable interrupt priorities, multiple timers and stack frame cache reduce software overhead for context management and event handling.
- Board‑level testability: IEEE 1149.1 (JTAG) boundary‑scan compatibility aids fault isolation and manufacturing test.
- Compact, RoHS‑compliant packaging: 196‑ball BGA surface‑mount package combines a small footprint with lead‑free compliancy for modern production requirements.
Why Choose GD80960JA25?
The GD80960JA25 positions a 32‑bit i960 core with integrated cache, on‑chip RAM, timers and a high‑bandwidth bus in a compact 196‑BGA package for embedded applications that require deterministic processing at a 25 MHz clock rate. Its 3.3 V I/O with 5 V tolerant inputs and TTL‑compatible outputs supports mixed‑voltage system interfaces while on‑chip debug and test features simplify development and production.
This part is suited to engineers and procurement teams seeking a commercially graded, RoHS‑compliant i960‑based microprocessor with on‑chip system resources and standard board‑level test support, offering a balance of integration and predictable performance for embedded designs.
Request a quote for GD80960JA25 to receive pricing, availability and lead‑time information for your project requirements.

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