LS1046ASE8T1A

IC MPU QORIQ 1.8GHZ 780FCPBGA
Part Description

ARM® Cortex®-A72 Microprocessor IC QorIQ® Layerscape 4 Core, 64-Bit 1.8GHz 780-FCPBGA (23x23)

Quantity 691 Available (as of October 8, 2026)
Product CategoryMicroprocessors
Part SeriesLS1046A
ManufacturerNXP USA Inc.
Manufacturing StatusActive
Manufacturer Standard Lead Time18 Weeks
Datasheet

Specifications & Environmental

Core ProcessorARM® Cortex®-A72Device Package780-FCPBGA (23x23)ECCN5A002A1 NXP
Ethernet10GbE (2), 2.5GbE (1), 1GbE (4)HTS Code8542.31.0001Moisture Sensitivity Level3 (168 Hours)
Mounting MethodSurface MountMounting TypeSurface MountNumber of Cores/Bus Width4 Core, 64-Bit
Operating Temperature0°C ~ 105°CPackage / Case780-FBGA, FCBGARAM ControllersDDR4
REACH ComplianceREACH UnaffectedRoHS ComplianceROHS3 CompliantSATASATA 6Gbps (1)
Security FeaturesSecure Boot, TrustZone®Speed1.8GHzSupplier Device Package780-FCPBGA (23×23)
USBUSB 3.0 (3) + PHY

Overview of LS1046ASE8T1A – ARM Cortex‑A72 4‑Core 1.8 GHz MPU, 780‑FCPBGA

The LS1046ASE8T1A is a QorIQ Layerscape microprocessor from NXP Semiconductors featuring four 64‑bit ARM® Cortex®‑A72 cores running up to 1.8 GHz. It combines high‑performance CPU cores with an integrated set of networking, storage and peripheral interfaces targeted at embedded applications.

Designed for embedded platforms that require multicore compute, integrated packet and crypto acceleration, and multiple high‑speed I/O options, the LS1046ASE8T1A delivers a balanced mix of performance, integration and system features in a 780‑FCPBGA (23 × 23 mm) package.

Key Features

  • Core and CPU subsystem — Four ARM® Cortex®‑A72 cores (64‑bit) arranged as a single cluster sharing a 2 MB L2 cache; up to 1.8 GHz operation with 32 KB L1 data and 48 KB L1 instruction caches per core.
  • Memory — One 32‑bit/64‑bit DDR4 SDRAM controller with ECC and interleaving support for robust system memory operation; DDR4 rated up to 2.1 GT/s.
  • Networking and packet acceleration — Multiple Ethernet interfaces including two 10 GbE, one 2.5 GbE and four 1 GbE ports; Data Path Acceleration Architecture (DPAA) with FMan, QMan and BMan for packet parsing, queuing and buffer management; IEEE 1588 support.
  • High‑speed peripheral interfaces — Eight SerDes lanes enabling flexible high‑speed I/O, three PCIe 3.0 controllers, one SATA 6 Gbit/s controller and three USB 3.0 controllers with integrated PHY.
  • Flash and peripheral controllers — Integrated flash controller supporting NAND and NOR, QSPI and SPI controllers, enhanced SD host controller supporting SD 3.0/eMMC 4.4/4.5.
  • Security — Secure Boot and ARM TrustZone® support plus cryptography acceleration via the SEC block for offloading security workloads.
  • System and reliability features — Hardware acceleration blocks, queue DMA (qDMA), enhanced DMA (eDMA), global interrupt controller (GIC) and thermal monitoring unit (TMU) for system management and reliability.
  • Package and environmental — 780‑FBGA (780‑FCPBGA) package, 23 mm × 23 mm, surface mount; operating temperature range 0 °C to 105 °C; RoHS compliant and consumer qualification.

Typical Applications

  • Network and security appliances — Multi‑core processing with DPAA and multiple 10 GbE/1 GbE interfaces enables packet processing, firewalling and secure gateway functions.
  • Edge compute and intelligent gateways — High single‑thread and multicore performance combined with PCIe and USB connectivity for local analytics and edge services.
  • Storage and NAS appliances — SATA 6 Gbit/s and PCIe connectivity support storage subsystem integration and data offload tasks.
  • Embedded platforms requiring secure boot — Built‑in Secure Boot and TrustZone® support provide a foundation for trusted platform deployment.

Unique Advantages

  • Highly integrated compute and I/O: Combines four Cortex‑A72 cores with multiple high‑speed interfaces (PCIe, SATA, USB, SerDes) to reduce system BOM and simplify board design.
  • Dedicated packet and buffer acceleration: DPAA (FMan/QMan/BMan) offloads networking tasks from cores, enabling more efficient packet handling and scheduling.
  • Hardware crypto and secure boot: SEC acceleration and TrustZone® plus Secure Boot support help secure data paths and system boot integrity without heavy CPU overhead.
  • Robust memory subsystem: DDR4 controller with ECC and interleaving support improves data integrity and supports higher memory throughput.
  • Compact, production‑ready package: 780‑FCPBGA (23 × 23 mm) surface‑mount package with 0 °C to 105 °C operating range for consumer‑qualified embedded designs.

Why Choose LS1046ASE8T1A?

The LS1046ASE8T1A positions itself as a balanced solution for embedded designs that need 64‑bit multicore performance alongside integrated networking, storage and security features. With a mix of Cortex‑A72 performance, DPAA for packet handling, hardware crypto and a broad set of I/O, it enables compact system designs with fewer external components.

This device is suited for engineers building embedded networked appliances, edge gateways and storage platforms that require deterministic packet and buffer management, secure boot capabilities, and a scalable multicore architecture backed by the LS1046A family design data.

Request a quote or submit a pricing and availability inquiry for the LS1046ASE8T1A to start your design and sourcing process.

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