AGLN250V2-ZVQG100
| Part Description |
IGLOO nano Field Programmable Gate Array (FPGA) IC 68 36864 6144 100-TQFP |
|---|---|
| Quantity | 891 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Microchip Technology |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 100-VQFP (14x14) | Grade | Commercial | Operating Temperature | -20°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 100-TQFP | Number of I/O | 68 | Voltage | 1.14 V - 1.575 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 6144 | Number of Logic Elements/Cells | 6144 | ||
| Number of Gates | 250000 | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 36864 |
Overview of AGLN250V2-ZVQG100 – IGLOO nano Field Programmable Gate Array (FPGA) IC 68 36864 6144 100-TQFP
The AGLN250V2-ZVQG100 is an IGLOO nano series flash-based FPGA from Microchip Technology. It delivers 250,000 system gates in a low-power flash architecture designed for space- and energy-conscious embedded designs.
With 6,144 logic elements, approximately 36,864 bits of on-chip RAM, and 68 user I/Os in a 100-pin TQFP (14 × 14 mm) surface-mount package, this device is targeted at compact, mixed-voltage systems that require retained configuration, in-system programming, and secure device content.
Key Features
- Core and Logic — 6,144 logic elements and an equivalent of 250,000 system gates provide mid-density logic capacity for control, glue-logic, and feature integration.
- Embedded Memory — Total on-chip RAM of 36,864 bits (true dual-port SRAM blocks) plus 1 kbit of FlashROM user nonvolatile memory for configuration and small data storage.
- I/O and Voltage Support — 68 user I/Os with mixed-voltage support (1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V); bank-selectable I/O voltages and programmable drive/slew options support flexible interfacing.
- Low-Power Flash Architecture — Flash-based CMOS process with Flash*Freeze technology enabling ultra-low power retention of programmed content and single-voltage system operation.
- Security and In-System Programming — On-chip 128-bit AES decryption via JTAG (IEEE 1532–compliant) and FlashLock for protecting FPGA contents during in-system programming.
- Performance — Series-level system performance up to 250 MHz in 1.5 V systems and 160 MHz in 1.2 V systems (as applicable across the IGLOO nano family).
- Clock and Timing — Configurable clock conditioning circuitry and PLL options in the IGLOO nano family for flexible clock management and phase/multiply/divide functionality.
- Package and Temperature — 100-TQFP (supplier package 100-VQFP, 14 × 14 mm), surface-mount mounting type, rated for commercial temperature operation from −20 °C to +85 °C.
- Compliance — RoHS compliant.
Typical Applications
- Battery-powered and portable systems — Low-power Flash*Freeze operation and single-voltage support help extend battery life while retaining configuration.
- Mixed-voltage interface bridging — Bank-selectable I/O voltages and up to 68 user I/Os enable level translation and connectivity between different voltage domains.
- Embedded control and glue logic — Mid-range logic capacity and on-chip RAM support peripheral control, protocol adaptation, and real-time glue logic functions.
- Secure in-system updates — On-chip AES ISP via JTAG and FlashLock support secure configuration updates in the field.
Unique Advantages
- Nonvolatile configuration retention: Flash-based architecture preserves programmed design when power is removed, eliminating the need for external configuration memory.
- Low standby and retention power: Flash*Freeze technology enables ultra-low power retention of configuration data for energy-sensitive designs.
- Flexible I/O across voltage domains: Mixed-voltage support and bank-selectable I/O provide straightforward interfacing without additional level-shifting components.
- On-chip security for ISP: Integrated 128-bit AES decryption and FlashLock protect design IP during in-system programming and updates.
- Compact, surface-mount package: 100-pin TQFP (14 × 14 mm) offers a compact footprint for space-constrained PCBs while supporting up to 68 user I/Os.
Why Choose AGLN250V2-ZVQG100?
The AGLN250V2-ZVQG100 combines mid-density logic capacity with low-power, flash-based nonvolatile operation and secure in-system programming features. It is well suited for designers seeking an integrated FPGA solution that balances programmable logic, embedded memory, and flexible I/O in a compact commercial-temperature package.
This device is appropriate for teams building space- or power-constrained embedded systems that require retained configuration, mixed-voltage interfacing, and secure field updates, backed by Microchip Technology’s IGLOO nano family capabilities.
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