AT40K10-2CQC
| Part Description |
AT40K/KLV Field Programmable Gate Array (FPGA) IC 130 4608 576 160-BQFP |
|---|---|
| Quantity | 63 Available (as of May 26, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Microchip Technology |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 160-PQFP (28x28) | Grade | Commercial | Operating Temperature | 0°C – 70°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 160-BQFP | Number of I/O | 130 | Voltage | 4.75 V - 5.25 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 576 | Number of Logic Elements/Cells | 576 | ||
| Number of Gates | 20000 | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 4608 |
Overview of AT40K10-2CQC – AT40K/KLV Field Programmable Gate Array (FPGA) IC 130 4608 576 160-BQFP
The AT40K10-2CQC is an SRAM-based FPGA from the AT40K family, delivering medium-density programmable logic with 576 logic elements and approximately 4,608 bits of embedded RAM. It targets system and DSP-oriented designs that require reconfigurable logic, on-chip RAM and a substantial I/O complement in a 160-pin BQFP surface-mount package.
Built on the AT40K series architecture, the device provides series-level features such as fast 10 ns distributed SRAM, high-speed array multipliers and PCI-compliant I/O capabilities — enabling use as a coprocessor or accelerated logic block in commercial electronic systems operating at 5 V.
Key Features
- Core Performance System-level speeds up to 100 MHz and array multipliers exceeding 50 MHz as documented for the AT40K series.
- Logic Density 576 logic elements (cells) delivering approximately 20,000 usable gates for medium-density logic implementations.
- Embedded Memory (FreeRAM) Approximately 4,608 bits of distributed, 10 ns SRAM usable in single- or dual-port, synchronous or asynchronous modes for FIFOs, scratchpads and coefficient storage.
- I/O and Interface 130 I/O pins with PCI-compliant I/O architecture and series-level 3 V/5 V capability and programmable output drive options.
- Clocking Support for up to 8 global clocks and additional dedicated PCI clocks with low-skew distribution and programmable edge control for timing-sensitive designs.
- Reconfigurability Cache Logic dynamic partial/full reconfigurability allows in-system updates and rapid design change workflows as described for the AT40K family.
- Package and Mounting 160-BQFP (160-PQFP, 28 × 28) surface-mount package suitable for standard SMT assembly.
- Power and Operating Range Supply voltage 4.75 V to 5.25 V with commercial operating temperature range 0 °C to 70 °C.
- Standards and Compliance RoHS compliant.
- Toolchain Integration Series-level compatibility with industry-standard design tools and IP cores for FFTs, FIR filters, UARTs and PCI functions.
Typical Applications
- DSP Acceleration and Coprocessing Implement FIR filters, FFTs, interpolators and other arithmetic-intensive blocks to offload host processors and improve system throughput.
- Video and Multimedia Processing Use embedded RAM and fast multipliers for video compression/decompression and coefficient-heavy algorithms.
- PCI and High-speed I/O Subsystems Leverage PCI-compliant I/O architecture and programmable drive to build interface logic, protocol bridges and I/O expansion.
- Adaptive and Reconfigurable Designs Employ Cache Logic reconfigurability for in-system updates, algorithm tuning and quick vector multiplier updates without full device replacement.
Unique Advantages
- Balanced medium-density integration: 576 logic elements with ~20,000 gates provide a practical balance of logic and routing for mid-size designs.
- Flexible on-chip RAM: Approximately 4,608 bits of 10 ns distributed SRAM supports multiple single- or dual-port memory functions without consuming separate logic resources.
- High I/O count with PCI capability: 130 I/Os and series-level PCI-compliant I/O architecture enable complex interface and peripheral connectivity.
- Reconfigurable in-system updates: Cache Logic allows partial or full device reconfiguration in-system, enabling adaptive designs and rapid iteration.
- Established toolchain support: Integration with industry-standard design tools and available IP cores shortens development time and simplifies synthesis and timing closure.
- Surface-mount package for compact boards: 160-BQFP packaging supports standard SMT assembly while providing a large pin count for dense interconnects.
Why Choose AT40K10-2CQC?
The AT40K10-2CQC positions itself as a practical, commercially graded FPGA for designers needing medium-density logic, embedded RAM and a robust I/O complement in a 160-pin surface-mount package. Its combination of 576 logic elements, ~4.6 kb of distributed SRAM and series-level features such as fast multipliers, multiple global clocks and Cache Logic reconfigurability make it well-suited for DSP acceleration, interface logic and adaptive system designs.
With RoHS compliance, 5 V supply operation and integration with established design tools and IP libraries, the device offers a development-friendly platform for commercial electronic products where reprogrammability and interface flexibility are priorities.
Request a quote or submit a pricing inquiry today to check availability and lead times for the AT40K10-2CQC.

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