AT40K20AL-1BGC
| Part Description |
AT40KAL Field Programmable Gate Array (FPGA) IC 256 8192 1024 352-LBGA |
|---|---|
| Quantity | 1,236 Available (as of October 7, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Microchip Technology |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 352-SBGA (35x35) | Grade | Commercial | Operating Temperature | 0°C – 70°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 352-LBGA | Number of I/O | 256 | Voltage | 3 V - 3.6 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 1024 | Number of Logic Elements/Cells | 1024 | ||
| Number of Gates | 30000 | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 8192 |
Overview of AT40K20AL-1BGC – AT40KAL FPGA, 256 I/O, 8,192-bit RAM, 1,024 Logic Elements, 352-LBGA
The AT40K20AL-1BGC is an SRAM-based field programmable gate array designed for high-performance, reconfigurable digital logic implementation. It delivers 1,024 logic elements, approximately 8,192 bits of distributed on-chip RAM, and up to 256 I/O pins in a 352-ball low-profile BGA package for dense system integration.
Targeted at applications requiring DSP acceleration, coprocessing and flexible I/O, this commercial-grade FPGA supports 3.0 V to 3.6 V supply operation, RoHS compliance and a 0 °C to 70 °C operating temperature range.
Key Features
- Core Architecture SRAM-based FPGA core with internal tri-state capability per cell and system speeds up to 100 MHz (series-level specification).
- Logic Resources 1,024 logic elements (cells) and approximately 30,000 gates to implement medium-density logic and control functions.
- Embedded Memory (FreeRAM) Approximately 8,192 bits of distributed, flexible SRAM supporting single/dual-port and synchronous/asynchronous configurations for FIFOs, scratch pads and coefficient storage.
- Arithmetic Performance Fast array multipliers (series-level >50 MHz) and a cell structure optimized for efficient vector/array multiplication tasks.
- I/O and Interface Capability 256 I/O pins with programmable output drive and PCI-compliant I/O options (series-level), enabling broad interface flexibility; 5 V I/O tolerant (series-level).
- Clocking Eight global clocks with low-skew distribution and programmable edge transitions plus additional dedicated PCI clocks (series-level) for complex timing requirements.
- Package & Mounting 352-LBGA (352-SBGA, 35×35) surface-mount package for high pin-count, space-efficient PCB designs.
- Power & Temperature Supply voltage range 3.0 V to 3.6 V; commercial operating temperature 0 °C to 70 °C.
- Compliance RoHS compliant.
Typical Applications
- DSP Acceleration Implements FIR filters, FFTs and other arithmetic-intensive functions using on-chip RAM and array multipliers for real-time signal processing.
- Multimedia Processing Supports video compression/decompression and discrete-cosine transform implementations where reconfigurable logic and embedded memory improve throughput.
- Coprocessor for Embedded Systems Offloads compute-heavy algorithms from processors by providing dedicated, reconfigurable logic and memory resources.
- PCI-Compatible Interface Designs Suitable for systems requiring PCI-compliant I/Os and flexible pin assignments in a compact BGA package.
Unique Advantages
- Dynamic Reconfiguration (Cache Logic) Series-level Cache Logic enables partial or full in-system reconfiguration without data loss, supporting adaptive designs and fast updates.
- Flexible On-Chip Memory Distributed 10 ns SRAM (FreeRAM) lets you create multiple independent RAM blocks without consuming separate logic resources, simplifying memory-intensive designs.
- High I/O Density 256 I/O pins in a 352-ball BGA allow dense board-level connectivity while preserving package footprint.
- DSP-Friendly Primitives Built-in array multiplier capability and cell-to-cell routing facilitate efficient implementation of arithmetic kernels used in multimedia and signal processing.
- Industry Tool Support (Series) The family is designed for use with industry-standard design flows and automatic component generators (series-level), easing synthesis, placement and routing.
Why Choose AT40K20AL-1BGC?
The AT40K20AL-1BGC combines mid-range logic capacity with flexible embedded memory and a high I/O count in a compact 352-LBGA package, making it well suited for DSP, coprocessing and interface-centric applications. Its SRAM-based architecture and dynamic reconfiguration capabilities provide adaptability for evolving algorithms and firmware updates.
With a commercial operating range, 3.0 V–3.6 V supply compatibility, RoHS compliance and series-level support for PCI-compliant I/Os and industry design tools, this part is a practical choice for engineers seeking a reconfigurable platform that balances performance, integration density and design flexibility.
Request a quote or submit an inquiry to evaluate AT40K20AL-1BGC for your next design.

Date Founded: 1989
Headquarters: Chandler, Arizona, USA
Employees: 22,000+
Revenue: $8.349 Billion
Certifications and Memberships: ISO9001:2015, IATF16949:2016, AS 9100D