AT40K20LV-3BQC
| Part Description |
AT40K/KLV Field Programmable Gate Array (FPGA) IC 114 8192 1024 144-LQFP |
|---|---|
| Quantity | 1,140 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Microchip Technology |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 144-LQFP (20x20) | Grade | Commercial | Operating Temperature | 0°C – 70°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 144-LQFP | Number of I/O | 114 | Voltage | 3 V - 3.6 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 1024 | Number of Logic Elements/Cells | 1024 | ||
| Number of Gates | 30000 | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 8192 |
Overview of AT40K20LV-3BQC – AT40K/KLV SRAM-based FPGA, 1024 logic elements, 8,192-bit RAM, 144-LQFP
The AT40K20LV-3BQC from Microchip Technology is an SRAM-based field programmable gate array (FPGA) in a 144-LQFP (20×20) package. It delivers reprogrammable logic with embedded RAM and multiple global clocks, targeted at designs that need flexible, in-system reconfigurability and DSP-style coprocessing.
This device is suitable for commercial-grade embedded applications requiring up to 30,000 gates of logic, 1,024 logic elements, and 8,192 bits of on-chip RAM, operating from 3.0 V to 3.6 V and within a 0 °C to 70 °C temperature range.
Key Features
- Core Performance — Family-level capabilities include system speeds to 100 MHz and array multipliers >50 MHz; the device provides internal tri-state capability inside each cell for flexible routing and logic implementation.
- On-chip Memory (FreeRAM) — 8,192 bits of distributed SRAM on this device (approximately 8 Kbits) with 10 ns access capability in the AT40K/AT40KLV family, enabling single- or dual-port, synchronous/asynchronous memory structures without consuming logic resources.
- Logic Density — 1,024 logic elements (cells) and approximately 30,000 usable gates for mid-range combinational and sequential designs.
- I/O and Interface — 114 I/O pins on the 144-LQFP package; family features include PCI-compliant I/O options and programmable output drive characteristics (as described in the series documentation).
- Clocking — Family-level support for up to 8 global clocks with low-skew distribution and programmable edge transitions for synchronous design control.
- Package and Mounting — 144-LQFP (20×20) surface-mount package, RoHS compliant, suitable for standard PCB assembly processes in commercial applications.
- Power and Environmental — Supply voltage range 3.0 V to 3.6 V; operating temperature range 0 °C to 70 °C (commercial grade).
- Reconfigurability — Series-level Cache Logic capability for dynamic full/partial in-system reconfigurability and unlimited re-programmability via serial or parallel modes.
Typical Applications
- DSP Coprocessor — Implement FIR filters, FFTs, convolvers and other arithmetic accelerators that augment a host processor for multimedia and signal-processing tasks.
- Video and Image Processing — Use array multipliers and distributed SRAM to accelerate video compression/decompression and related transforms (e.g., DCT).
- Security and Encryption — Deploy configurable logic to implement encryption engines and related high-throughput arithmetic functions.
- Custom I/O and Protocol Bridging — Leverage the device’s programmable I/O and on-chip RAM for protocol adaptation, buffering and custom interface logic.
Unique Advantages
- Reconfigurable On-board Memory: Embedded distributed SRAM (8,192 bits) provides flexible single/dual-port memory without consuming logic elements, simplifying FIFO and scratch-pad designs.
- Dynamic In-System Reconfiguration: Cache Logic and unlimited reprogramming modes allow partial or full reconfiguration in-system, enabling adaptive designs and rapid updates.
- Balanced Mid-range Density: Approximately 30,000 gates and 1,024 logic elements offer a balance between capacity and cost for mid-complexity designs.
- Commercial-grade Form Factor: 144-LQFP surface-mount package with 114 I/Os supports dense PCB layouts while remaining RoHS compliant.
- Clocking and Performance Features: Multiple global clocks and family-level support for low-skew distribution and programmable edges help simplify timing across synchronous designs.
- Toolchain and Migration Support: The series integrates with industry-standard design flows and provides automatic component generators and IP cores to accelerate development and migration to gate arrays for production.
Why Choose AT40K20LV-3BQC?
The AT40K20LV-3BQC combines mid-range logic capacity, on-chip SRAM, and in-system reconfigurability in a commercial-grade LQFP package. It is well suited to engineers building DSP accelerators, protocol bridges, or custom interface logic who need flexible memory and dynamic update capabilities within a compact surface-mount footprint.
With a supply range of 3.0 V to 3.6 V, 114 I/Os, and integration with established design tools and IP, this FPGA provides a pragmatic path from development to production for commercial embedded applications that require adaptable logic and embedded RAM.
Request a quote or submit your RFQ to get pricing, availability, and lead-time information for the AT40K20LV-3BQC. Our team can provide additional technical details and support for your design evaluation.

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