LAV-AT-G70-3LFG1156I

LATTICE AVANT MID-RANGE GENERAL
Part Description

Avant™-G Field Programmable Gate Array (FPGA) IC 554 4239360 637000 1156-BBGA, FCBGA

Quantity 1,243 Available (as of May 6, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerLattice Semiconductor Corporation
Manufacturing StatusActive
Manufacturer Standard Lead Time8 Weeks
Datasheet

Specifications & Environmental

Device Package1156-FCBGA (35x35)GradeIndustrialOperating Temperature-40°C – 100°C
Package / Case1156-BBGA, FCBGANumber of I/O554Voltage820 mV
Mounting MethodSurface MountRoHS ComplianceROHS3 CompliantREACH ComplianceREACH Unaffected
Moisture Sensitivity LevelN/ANumber of LABs/CLBsN/ANumber of Logic Elements/Cells637000
Number of GatesN/AECCNN/AHTS CodeN/A
QualificationN/ATotal RAM Bits4239360

Overview of LAV-AT-G70-3LFG1156I – Avant™-G FPGA IC, 1156‑BBGA (FCBGA)

The LAV-AT-G70-3LFG1156I is an Avant™-G field programmable gate array (FPGA) device offered in a 1156‑BBGA (FCBGA) package. Built on the Lattice Avant platform, this industrial-grade FPGA integrates a high logic element count, substantial embedded memory, and extensive I/O to address designs that require programmable logic, on-chip memory, and advanced clocking and I/O features.

With 637,000 logic elements, approximately 4.24 Mbits of embedded RAM and 554 I/O pins, this device targets applications that need high-density logic, large on-chip memory capacity, and varied interface support within a surface-mount 1156‑FCBGA (35×35) package.

Key Features

  • Avant platform architecture  Documented Avant architecture with programmable functional unit blocks, routing, and clocking structures described in the device family overview.
  • High logic density  Approximately 637,000 logic elements provide large-scale programmable logic capacity for complex designs.
  • Embedded memory  Approximately 4.24 Mbits of on-chip RAM (4,239,360 bits) supporting single, dual and pseudo-dual port modes, FIFO modes, and memory cascading.
  • Extensive I/O  554 I/O pins support varied signaling and a sysI/O banking scheme with programmable I/O cells for input, output, and tri-state control.
  • Advanced clocking  On-chip oscillator, PLL, global and regional clock networks, dynamic clock select/control, clock synchronizers/dividers and DLL delay options enable flexible timing architectures.
  • High-speed interfaces and memory PHY  Built-in DDR memory support with DDRPHY and SERDES/PCS blocks described for high-speed serial and memory interfaces.
  • Programmable DSP resources  sysDSP resources are included in the platform architecture for signal processing and compute-optimized datapaths.
  • Industrial temperature grade  Rated for operation from −40 °C to 100 °C, suitable for industrial environments that require extended temperature range.
  • Compact surface-mount package  1156‑BBGA (1156‑FCBGA) package, supplier device package 1156‑FCBGA (35×35), designed for surface-mount PCB assembly.
  • RoHS compliant  Device meets RoHS requirements.
  • Supply voltage  Documented supply point at 820 mV for the device core.

Typical Applications

  • Communications and networking systems  High logic density, SERDES/PCS capabilities and abundant I/O make the device suitable for packet processing, protocol bridging and high-speed interface tasks.
  • High-performance embedded systems  Large on-chip RAM, sysDSP resources, and flexible clocking are useful for compute-intensive embedded controllers and signal processing platforms.
  • Industrial control and automation  Industrial temperature rating, extensive I/O and programmable logic support motor control, sensor aggregation, and deterministic control functions.
  • Memory and storage interfaces  DDRPHY support and sysMEM features enable local memory controllers, buffering and FIFO designs for storage and memory subsystems.

Unique Advantages

  • High-density programmable logic:  637,000 logic elements enable consolidation of complex functions into a single device, reducing board-level component count.
  • Substantial on-chip RAM:  Approximately 4.24 Mbits of embedded memory supports large data buffers, FIFOs and memory-mapped functions without external RAM.
  • Large, flexible I/O compliment:  554 I/O pins and programmable I/O cells simplify multi-channel interfacing and signal partitioning across banks.
  • Integrated clocking and timing features:  On-chip oscillator, PLLs, dynamic clock control and DLL delay support complex timing domains and clock distribution strategies.
  • Support for high-speed interfaces:  DDRPHY and SERDES/PCS blocks provide native building blocks for high-throughput serial links and memory interfaces.
  • Industrial-rated robustness:  −40 °C to 100 °C operating range and surface-mount 1156‑FCBGA packaging suit demanding operating environments.

Why Choose LAV-AT-G70-3LFG1156I?

The LAV-AT-G70-3LFG1156I combines a high logic element count, sizeable embedded memory, and broad I/O capacity within the Avant™-G FPGA architecture to support dense, multifunction programmable designs. Its platform-level features—clocking, sysMEM/sysDSP resources, DDRPHY and SERDES/PCS—provide the building blocks needed for complex communications, embedded compute and industrial control applications.

This device is positioned for customers who require a scalable, industrial-grade FPGA that integrates on-chip memory and advanced I/O in a compact 1156‑FCBGA package, offering a balance of integration and flexibility for long-term designs backed by platform documentation.

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