LCMXO1200C-3T144I
| Part Description |
MachXO Field Programmable Gate Array (FPGA) IC 113 9421 1200 144-LQFP |
|---|---|
| Quantity | 582 Available (as of October 8, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Lattice Semiconductor Corporation |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 144-TQFP (20x20) | Grade | Industrial | Operating Temperature | -40°C – 100°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 144-LQFP | Number of I/O | 113 | Voltage | 1.71 V - 3.465 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 150 | Number of Logic Elements/Cells | 1200 | ||
| Number of Gates | N/A | ECCN | EAR99 | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 9421 |
Overview of LCMXO1200C-3T144I – MachXO FPGA, 1200 Logic Elements, 144-LQFP
The LCMXO1200C-3T144I is a MachXO family Field Programmable Gate Array (FPGA) from Lattice Semiconductor, delivered in a 144-pin LQFP/TQFP (20×20 mm) surface-mount package. It combines non-volatile configuration, instant-on capability, and reconfigurable SRAM logic to address glue logic, bus bridging, bus interfacing, power-up control and other system control applications.
With 1,200 logic elements, 113 I/Os and on-chip RAM, this device targets industrial designs that require fast start-up, in-field reconfiguration and a compact single-chip implementation to reduce board-level complexity.
Key Features
- Core Logic Provides 1,200 logic elements for implementing glue logic, control functions and moderate-density FPGA designs.
- On-chip Memory Approximately 9,421 bits of on-chip RAM for embedded and distributed memory needs.
- I/O and Packaging 113 programmable I/Os in a 144-LQFP (144-TQFP 20×20 mm) package, suitable for surface-mount PCB assembly.
- Non-volatile Configuration Single-chip, non-volatile architecture with instant-on behavior and no external configuration memory required.
- In-field Reconfiguration Supports background programming and TransFR™ reconfiguration to update logic while the system operates.
- Programmable I/O Buffer Flexible sysIO™ buffer support (family-level) for a wide range of interfaces listed in the MachXO family specification.
- Clocking Includes analog PLL support as defined for the MachXO1200 family (family-level PLL resources).
- Power and Temperature Operates from 1.71 V to 3.465 V and is rated for industrial temperature range (−40 °C to 100 °C).
- Low-power Modes Family features include a sleep mode for significant static current reduction.
- Programming and Test SRAM and non-volatile memory are programmable through the JTAG port; supports IEEE 1149.1 boundary scan and in-system programming.
- Regulatory RoHS compliant packaging.
Typical Applications
- Glue Logic Implement board-level glue logic and simple state machines to consolidate discrete components and reduce BOM.
- Bus Bridging and Interfacing Bridge or adapt between buses and protocols using the device’s programmable I/Os and logic fabric.
- Power-up and Reset Control Implement power sequencing, brown-out monitoring and reset control with instant-on responsiveness.
- System Control Logic Handle control-plane tasks, peripheral interfaces and system state machines in industrial equipment.
- Field Upgrades Enable in-field logic updates and background programming while maintaining system operation.
Unique Advantages
- Instant-on, single-chip configuration: Eliminates the need for external configuration memory and enables microsecond-class power-up for faster system initialization.
- Single-package integration: Combines 1,200 logic elements, on-chip RAM and 113 I/Os in a compact 144-LQFP surface-mount package to save board area and reduce component count.
- Industrial reliability: Rated for −40 °C to 100 °C operation and industrial grade use, making it suitable for demanding environments.
- Field reprogrammability: Supports background programming and TransFR reconfiguration for in-field updates without full system downtime.
- Flexible power rails: Wide supply range (1.71 V–3.465 V) accommodates multiple I/O voltage domains and integration scenarios.
- Standards-based programming and test: JTAG-programmable SRAM and non-volatile memory with IEEE 1149.1 support simplifies development and manufacturing test.
Why Choose LCMXO1200C-3T144I?
The LCMXO1200C-3T144I offers a balanced mix of non-volatile configuration, reconfigurable logic and flexible I/O in a compact industrial-grade package. It is well-suited for engineers seeking a single-chip solution to replace discrete glue logic, implement bus interfacing, or add field-updateable control functionality while keeping BOM and PCB footprint to a minimum.
Designed for applications that require fast start-up, in-system reprogramming and reliable operation across a wide temperature range, this device benefits from the MachXO family’s system-level features—programmable I/O buffers, on-chip memory and JTAG programmability—backed by established Lattice tooling and documentation.
Request a quote or submit an inquiry to obtain pricing, lead times and availability for the LCMXO1200C-3T144I.

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