EN35QXR512A-104YIP(2SC)
| Part Description |
512‑Mbit SPI NOR Flash, Industrial, 8‑pin WSON |
|---|---|
| Quantity | 217 Available (as of May 5, 2026) |
Specifications & Environmental
| Device Package | 8-pin WSON 8x6mm | Memory Format | DRAM | Technology | SPI NOR Flash | ||
|---|---|---|---|---|---|---|---|
| Memory Size | 512 Mbit | Access Time | 8 ns | Grade | Industrial | ||
| Clock Frequency | 104 MHz | Voltage | 2.5V | Memory Type | Non-Volatile | ||
| Operating Temperature | -40°C – 85°C | Write Cycle Time Word Page | 500 µs | Packaging | 8-pin WSON 8x6mm | ||
| Mounting Method | Surface Mount | Memory Interface | Parallel | Memory Organization | 2M x 8 | ||
| Moisture Sensitivity Level | 3 | RoHS Compliance | Compliant | REACH Compliance | REACH Unknown | ||
| Qualification | N/A | ECCN | EAR99 | HTS Code | 8542.32.00.71 |
Overview of EN35QXR512A-104YIP(2SC) – 512‑Mbit SPI NOR Flash, Industrial, 8‑pin WSON
The EN35QXR512A-104YIP(2SC) is a 512 Megabit serial NOR Flash memory device from ESMT, engineered for industrial embedded applications. It implements a serial SPI architecture with Single, Dual and Quad I/O modes and is optimized for high-performance code and data storage in constrained, surface-mount form factors.
This industrial-grade device delivers fast read performance up to a 104 MHz clock rate (with additional Quad I/O options up to 133 MHz), uniform 4-Kbyte sector architecture and durable program/erase characteristics suitable for in-field updates and protected memory regions.
Key Features
- Memory Capacity & Organization — 512 Mbit serial Flash organized as 2M × 8 with 256‑byte programmable pages and 262,144 pages total for granular data and code storage.
- Interface & Read Performance — SPI-compatible serial interface supporting Standard, Dual and Quad SPI; Fast Read up to 104 MHz for Single/Dual/Quad I/O and Quad I/O support up to 133 MHz (series capability).
- Erase & Program Performance — Typical page program time of 0.5 ms; sector erase ~40 ms, half-block ~200 ms, block erase ~300 ms and full chip erase ~120 s, enabling fast updates and flexible memory management.
- Endurance & Data Retention — Minimum 100K program/erase cycles per sector and typical data retention of 20 years for long-term reliability in fielded systems.
- Power & Low‑Power Modes — Low active current (typical 24 mA) and power-down current (typical 2 µA) to help manage energy in battery-assisted or low-power systems.
- Security & Protection — Uniform 4-Kbyte sector architecture with software and hardware write protection, lockable OTP sector and Replay‑Protected Monotonic Counter (RPMC) for secure storage options.
- Package & Temperature — Surface-mount 8‑contact WSON package (8 × 6 mm) and industrial operating range of −40 °C to 85 °C for harsh-environment deployments.
Typical Applications
- Firmware and boot storage — Store boot code and firmware images with sector-level protection and support for in-field updates and code patching.
- Embedded system code shadowing — Use Quad SPI fast read modes to accelerate execute-in-place or code shadowing from serial Flash in microcontroller and MPU systems.
- Configuration and secure data storage — Leverage software/hardware write protection and lockable OTP for secure storage of configuration, calibration or device identity data.
Unique Advantages
- High-throughput serial read options — Up to 104 MHz (Single/Dual/Quad) with Quad I/O capability up to 133 MHz to reduce boot and data transfer times.
- Fine-grained memory control — 4-Kbyte uniform sector architecture and multiple block sizes allow selective erasure and updates without full-chip operations.
- Robust program/erase lifecycle — Designed for a minimum of 100K cycles per sector, supporting long-term updateable storage needs.
- Low-power standby — Typical 2 µA power-down current helps minimize standby energy consumption in always‑on or battery-assisted designs.
- Industrial-grade packaging — 8‑pin WSON 8×6 mm surface-mount package and −40 °C to 85 °C operating range for reliable installation in industrial environments.
- Flexible SPI modes — Standard, Dual and Quad SPI support provides compatibility with a wide range of host controllers and throughput requirements.
Why Choose EN35QXR512A-104YIP(2SC)?
The EN35QXR512A-104YIP(2SC) balances high-density non-volatile storage with flexible SPI performance and industrial robustness, making it well suited for embedded systems that require field-updatable code, protected data regions and reliable long-term retention. Its combination of fast read modes, sector-level management and endurance characteristics supports designs that need both performance and maintainability.
This device is a strong fit for engineers building industrial controllers, IoT gateways, and embedded platforms that demand secure, updateable firmware storage in a compact surface-mount package from a recognized memory vendor.
Request a quote or submit an inquiry to obtain pricing, availability and lead-time information for the EN35QXR512A-104YIP(2SC).
Date Founded: 1998
Headquarters: Hsinchu Science Park, Hsinchu, Taiwan
Employees: 400+
Revenue: $377.8 Million
Certifications and Memberships: N/A