EN35QXR512A-133WIP(2SC)

512Mb SPI NOR Flash Ind.
Part Description

512 Mbit SPI NOR Flash, 133 MHz Quad I/O, Industrial, 8‑pin WSON

Quantity 427 Available (as of May 6, 2026)
Product CategoryMemory
ManufacturerESMT
Manufacturing StatusMP
Manufacturer Standard Lead TimeRFQ
Datasheet

Specifications & Environmental

Device Package8-pin WSON 5x6mmMemory FormatDRAMTechnologySPI NOR Flash
Memory Size512 MbitAccess Time8 nsGradeIndustrial
Clock Frequency133 MHzVoltage2.5VMemory TypeNon-Volatile
Operating Temperature-40°C – 85°CWrite Cycle Time Word Page500 µsPackaging8-pin WSON 5x6mm
Mounting MethodSurface MountMemory InterfaceParallelMemory Organization2M x 8
Moisture Sensitivity Level3RoHS ComplianceCompliantREACH ComplianceREACH Unknown
QualificationN/AECCNEAR99HTS Code8542.32.00.71

Overview of EN35QXR512A-133WIP(2SC) – 512 Mbit SPI NOR Flash, 133 MHz Quad I/O, Industrial, 8‑pin WSON

The EN35QXR512A-133WIP(2SC) is a 512 Mbit serial SPI NOR Flash device offering Single/Dual/Quad SPI operation and a uniform 4-Kbyte sector architecture. Designed for industrial temperature use, it targets firmware storage, in-field code updates and high-speed code/data read applications that require reliable non-volatile storage with hardware and software protection features.

Built on a serial interface architecture with support for high-speed Quad I/O Fast Read up to 133 MHz, this device balances fast read throughput, granular erase/program control and built-in security primitives for embedded systems and industrial designs.

Key Features

  • Memory  512 M-bit serial flash organized as 65,536 KByte total, 262,144 pages with 256 bytes per programmable page and a uniform 4-Kbyte sector architecture.
  • Interface  Serial Peripheral Interface (SPI) compatible, supporting Standard, Dual and Quad SPI modes. SPI compatible modes 0 and 3 are supported with standard pins CLK, CS#, DI (DQ0), DO (DQ1), plus DQ2/DQ3 for Quad I/O.
  • High‑speed Read  Quad I/O Fast Read up to 133 MHz (conditional by ordering part number) and up to 104 MHz for Single/Dual/Quad I/O Fast Read, with configurable dummy cycle count for timing optimization.
  • Program & Erase Performance  Typical page program time 0.5 ms; typical sector erase time 40 ms, half-block 200 ms, block erase 300 ms and full chip erase 120 seconds—providing predictable program/erase behavior.
  • Power  Single power supply operation with low power consumption: typical active current ~24 mA and typical power-down current ~2 µA.
  • Protection & Security  Software and hardware write protection options, lockable 3×512‑byte OTP security sector, Read Unique ID and a Replay‑Protected Monotonic Counter (RPMC) for secure applications.
  • Reliability  Minimum 100K program/erase cycles per sector or block and data retention specified at 20 years.
  • Package & Temperature  Surface-mount 8‑pin WSON (5×6 mm) package option with industrial operating temperature range of −40 °C to 85 °C.

Typical Applications

  • Firmware storage and in-field updates  Granular sector architecture and software/hardware protection enable safe patching and partial updates of code segments without exposing the entire memory.
  • System boot and code read‑out  High-speed Quad I/O Fast Read (up to 133 MHz) supports rapid code retrieval for boot loaders and system firmware.
  • Secure configuration and counters  Lockable OTP region, Read Unique ID and RPMC support secure storage of cryptographic keys, configuration and monotonic counters.
  • Industrial controllers and embedded equipment  Industrial temperature rating (−40 °C to 85 °C) and surface-mount packaging make this device suitable for industrial automation and control electronics.

Unique Advantages

  • Flexible SPI modes: Single, Dual and Quad SPI support lets designs trade pin usage for throughput without changing the memory family.
  • High throughput reads: 133 MHz Quad I/O Fast Read reduces read latency for firmware and data access in time-sensitive systems.
  • Granular erase control: 4-Kbyte uniform sectors allow selective updates and minimize erase overhead during field updates or incremental data writes.
  • Security primitives: Lockable OTP and RPMC provide on-device options for secure keys and tamper-resistant counters.
  • Industrial readiness: Specified operating range to −40 °C and 85 °C and surface-mount WSON packaging simplify integration into industrial PCBs.
  • Predictable program/erase timing: Published typical times for page program and sector/block erase enable deterministic firmware update and manufacturing flows.

Why Choose EN35QXR512A-133WIP(2SC)?

The EN35QXR512A-133WIP(2SC) positions itself as a robust serial NOR flash option for designs that require high-speed Quad I/O reads, secure on‑device features and industrial temperature operation. Its uniform 4-Kbyte sectors, lockable OTP and RPMC combine to support in-field firmware updates, secure storage and modular code management.

This device is well suited to embedded and industrial customers seeking a proven SPI NOR Flash solution with documented program/erase profiling, flexible SPI modes and low-power standby characteristics—facilitating reliable long-term deployments and streamlined firmware maintenance.

Request a quote or submit a purchase inquiry to receive availability, pricing and ordering information for EN35QXR512A-133WIP(2SC).

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