EN35QXR512A-133YIP(2SC)
| Part Description |
512 Mbit SPI NOR Flash, Industrial Grade, 8‑pin WSON 8×6mm |
|---|---|
| Quantity | 1,004 Available (as of May 5, 2026) |
Specifications & Environmental
| Device Package | 8-pin WSON 8x6mm | Memory Format | DRAM | Technology | SPI NOR Flash | ||
|---|---|---|---|---|---|---|---|
| Memory Size | 512 Mbit | Access Time | 8 ns | Grade | Industrial | ||
| Clock Frequency | 133 MHz | Voltage | 2.5V | Memory Type | Non-Volatile | ||
| Operating Temperature | -40°C – 85°C | Write Cycle Time Word Page | 500 µs | Packaging | 8-pin WSON 8x6mm | ||
| Mounting Method | Surface Mount | Memory Interface | Parallel | Memory Organization | 2M x 8 | ||
| Moisture Sensitivity Level | 3 | RoHS Compliance | Compliant | REACH Compliance | REACH Unknown | ||
| Qualification | N/A | ECCN | EAR99 | HTS Code | 8542.32.00.71 |
Overview of EN35QXR512A-133YIP(2SC) – 512 Mbit SPI NOR Flash, Industrial Grade, 8‑pin WSON 8×6mm
The EN35QXR512A-133YIP(2SC) is a 512 Mbit serial NOR flash memory device designed for industrial embedded systems requiring non‑volatile code and data storage. It implements an SPI‑compatible serial interface with support for Single, Dual and Quad I/O and high‑speed Quad I/O Fast Read operation up to 133 MHz.
Built with a uniform 4 KB sector architecture and industrial temperature range (‑40 °C to 85 °C), this device provides flexible erase/program granularity, secure storage options and low power modes suitable for firmware storage, in‑field updates and other robust embedded storage needs.
Key Features
- Capacity & Organization — 512 Mbit (65,536 KByte) total capacity organized as 2M × 8 with 262,144 pages and 256 bytes per programmable page.
- Serial SPI Architecture — SPI‑compatible interface supporting Standard, Dual and Quad SPI modes; operates in SPI Mode 0 and Mode 3 with configurable dummy cycles.
- High‑Speed Read — Quad I/O Fast Read up to 133 MHz (104 MHz for Single/Dual/Quad I/O Fast Read in other modes), enabling faster execute‑in‑place and data transfer performance.
- Program & Erase Performance — Typical page program time 0.5 ms; sector erase 40 ms typical; half‑block erase 200 ms typical; block erase 300 ms typical; chip erase 120 s typical.
- Uniform Sector Architecture — 16,384 sectors of 4 KB, 2,048 blocks of 32 KB and 1,024 blocks of 64 KB allow selective erase and efficient storage management.
- Reliability & Endurance — Minimum 100K program/erase cycles per sector or block and typical data retention of 20 years for long‑term reliability.
- Security & Device Features — Lockable 3 × 512‑byte OTP security sector, Read Unique ID, and Replay‑Protected Monotonic Counter (RPMC) for secure storage and anti‑replay capabilities.
- Power & Low‑Power Modes — Low active current (typical 24 mA) and low power down current (typical 2 µA) to minimize system power consumption in standby.
- Package & Temperature — Industrial temperature range (‑40 °C to 85 °C) in a compact 8‑contact WSON / VDFN 8×6 mm package option suitable for surface‑mount assembly.
- Addressing & Compatibility — Supports 3‑byte and 4‑byte address modes and Serial Flash Discoverable Parameters (SFDP) for compatibility with host controllers and boot loaders.
Typical Applications
- Firmware and In‑field Updates — Stores code images and supports selective sector/block erase to enable patching and incremental firmware updates without affecting protected regions.
- Industrial Embedded Systems — Industrial grade temperature range and robust endurance make it suitable for control systems, PLCs and factory automation requiring reliable non‑volatile storage.
- Secure Storage — Lockable OTP sector plus Read Unique ID and RPMC support secure keys, counters and small secure data areas for device identity and anti‑rollback uses.
- Space‑Constrained Designs — Compact 8‑pin WSON 8×6 mm package provides high density non‑volatile storage where PCB area is limited.
Unique Advantages
- High‑speed Quad I/O up to 133 MHz: Accelerates read throughput for faster boot and data transfers where performance matters.
- Flexible erase granularity: 4 KB sectors with selectable block and chip erase enable efficient updates and minimize erase‑write wear on critical data regions.
- Strong endurance and long retention: 100K program/erase cycles and 20‑year data retention support long‑lifecycle industrial deployments.
- Built‑in security primitives: OTP sector and RPMC provide on‑device mechanisms for secure storage and anti‑replay protections.
- Low power standby: Typical 2 µA power down current helps reduce system standby power in battery‑sensitive or always‑on equipment.
- Industrial temperature and compact package: Designed for harsh environments and constrained PCBs with an 8‑pin WSON 8×6 mm surface‑mount package.
Why Choose EN35QXR512A-133YIP(2SC)?
The EN35QXR512A-133YIP(2SC) delivers a balanced mix of capacity, performance and industrial reliability for embedded designs that require robust non‑volatile storage. With 512 Mbit density, high‑speed Quad I/O operation, flexible sector/block architecture and secure storage features, it addresses firmware storage, in‑field updates and protected data needs in industrial applications.
This device is well suited to designers seeking a compact, durable SPI NOR flash with proven endurance, low power standby behavior and device features that simplify secure firmware management and system updates over product lifetimes.
Request a quote or submit an inquiry to learn more about pricing, lead times and how EN35QXR512A-133YIP(2SC) can be integrated into your next embedded design.
Date Founded: 1998
Headquarters: Hsinchu Science Park, Hsinchu, Taiwan
Employees: 400+
Revenue: $377.8 Million
Certifications and Memberships: N/A