DRA725AMGABCRQ1

IC MPU DRA72X CORTEX-A15 760BGA
Part Description

ARM® Cortex®-A15 Microprocessor IC DRA72x 1 Core, 32-Bit 750MHz 760-FCBGA (23x23)

Quantity 1,533 Available (as of October 8, 2026)
Product CategoryMicroprocessors
Part SeriesJacinto DRA72x
ManufacturerTexas Instruments
Manufacturing StatusActive
Manufacturer Standard Lead Time26 Weeks
Datasheet

Specifications & Environmental

Co-Processors/DSPARM® Cortex®-M4, BB2D, C66x, GPU, IVACore ProcessorARM® Cortex®-A15Device Package760-FCBGA (23x23)
Display & Interface ControllersHDMI, LCDECCNN/AEthernet10/100Mbps (1), 10/100/1000Mbps (1)
GradeAutomotiveGraphics AccelerationYesHTS CodeN/A
Moisture Sensitivity Level3 (168 Hours)Mounting MethodSurface MountMounting TypeSurface Mount
Number of Cores/Bus Width1 Core, 32-BitOperating Temperature-40°C ~ 125°C (TJ)Package / Case760-BFBGA, FCBGA
QualificationAEC-Q100RAM ControllersDDR3, DDR3LREACH ComplianceREACH Unknown
RoHS ComplianceROHS3 CompliantSATASATASecurity FeaturesCryptography, Debug Security, Device Identity, Isolation Firewalls, Secure Boot, Secure Storage, Software IP Protection
Speed750MHzSupplier Device Package760-FCBGA (23×23)USBUSB 2.0 (2), USB 3.0 (1)
Voltage – I/O1.35V, 1.5V, 1.8V, 3.3V

Overview of DRA725AMGABCRQ1 – IC MPU DRA72X CORTEX-A15 760BGA

The DRA725AMGABCRQ1 is an ARM® Cortex®-A15 microprocessor IC from Texas Instruments' Jacinto DRA72x series. It provides a single 32-bit Cortex-A15 core running at 750 MHz in a 760‑FCBGA (23 × 23 mm) package, built for embedded infotainment and multimedia applications.

Engineered for automotive and embedded markets, the device combines a high-performance application core with heterogeneous co‑processors, extensive multimedia and display support, broad connectivity, and hardware security features. The part is AEC‑Q100 qualified and specified for operation from −40 °C to 125 °C.

Key Features

  • Processing Core — Single ARM® Cortex®‑A15, 32‑bit core running at 750 MHz, targeted at application and control tasks.
  • Heterogeneous Co‑Processing — Integrated acceleration and co‑processors including ARM® Cortex®‑M4 image processing units, C66x DSP cores, BB2D 2D graphics accelerator, IVA subsystem, and a single‑core PowerVR™ SGX544 3D GPU for graphics and video processing.
  • Memory and On‑Chip RAM — DDR3/DDR3L external memory controller (EMIF) with DDR3‑1333 support and up to 2 GB across a single chip select; up to 512 KB of on‑chip L3 RAM for low‑latency buffering.
  • Display and Video — Full‑HD video support (1920 × 1080p, 60 fps), display controller with DMA and up to three pipelines, HDMI (1.4a)/DVI encoder, Video Processing Engine (VPE), and a Video Input Port (VIP) supporting multiplexed inputs.
  • High‑Speed Interfaces — Multi‑mode connectivity including USB 3.0 (SuperSpeed) dual‑role, USB 2.0, SATA, PCIe (Gen2 lanes), and multiple SD/MMC and QSPI interfaces.
  • Automotive and Network Connectivity — Integrated Ethernet options (10/100 Mbps and 10/100/1000 Mbps), dual CAN 2.0B controllers, MIPI CSI‑2 camera interface, and extensive serial interfaces (I2C, SPI, UART, McASP audio ports).
  • Security and Device Integrity — Hardware cryptography accelerators, secure boot, secure storage, device identity, isolation firewalls, debug security (JTAG lock), and software IP protection.
  • System and Debug — Enhanced DMA (EDMA), general‑purpose memory controller (GPMC), on‑chip debug with CTools technology, power/reset/clock management, and up to 215 GPIOs.
  • Package and Thermal — 760‑pin FCBGA (23 × 23 mm, 0.8 mm pitch) surface‑mount package; operating temperature range −40 °C to 125 °C; AEC‑Q100 qualification for automotive applications.

Typical Applications

  • Human‑Machine Interface (HMI) — Drive rich graphical user interfaces and touch displays with the integrated 2D/3D graphics and display controller.
  • Navigation Systems — Support navigation and map rendering with Full‑HD video playback and heterogeneous processing resources.
  • Rear‑Seat and In‑Vehicle Entertainment — Power multimedia playback, multiple video inputs/outputs, and audio interfaces for in‑car entertainment systems.
  • Advanced Driver Assistance Systems (ADAS) Integration — Enable image and video processing paths and co‑processor acceleration for ADAS and Jacinto‑series integration scenarios.

Unique Advantages

  • Highly integrated multimedia platform: Combines Cortex‑A15 application processing with DSPs, GPU, IVA, and video pipelines to simplify multimedia system design and reduce BOM.
  • Automotive‑grade qualification: AEC‑Q100 qualification and −40 °C to 125 °C operating range support deployment in automotive environments.
  • Extensive connectivity: Broad set of interfaces (USB 3.0, SATA, PCIe, Gigabit Ethernet, CAN, MIPI CSI‑2, SD/MMC) enables flexible system architectures and peripheral integration.
  • Robust device security: On‑chip cryptography, secure boot, device identity, and isolation firewalls protect software IP and device integrity.
  • Designed for Full‑HD and multi‑input video: Video engine, VIP, HDMI encoder, and display pipelines enable high‑quality video capture and output for infotainment systems.

Why Choose DRA725AMGABCRQ1?

The DRA725AMGABCRQ1 positions itself as a purpose‑built processor for advanced infotainment and embedded multimedia systems that require a balance of application performance, dedicated accelerators, and broad I/O. Its single Cortex‑A15 core at 750 MHz combined with DSPs, GPU, and IVA provides a heterogeneous platform for handling graphics, video, and signal processing workloads within a single device.

As part of the Jacinto DRA72x family, this AEC‑Q100 qualified device suits automotive and industrial projects demanding thermal resilience, comprehensive connectivity, and built‑in security. It is well suited for designers building HMI, navigation, entertainment, and ADAS‑adjacent systems where integration, feature density, and proven silicon architecture reduce system complexity and time to market.

Request a quote or submit a purchasing inquiry for the DRA725AMGABCRQ1 to receive pricing, availability, and lead‑time details for your project.

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