LCMXO2-2000HE-6TG100C
| Part Description |
MachXO2 Field Programmable Gate Array (FPGA) IC 79 75776 2112 100-LQFP |
|---|---|
| Quantity | 717 Available (as of October 7, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Lattice Semiconductor Corporation |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 20 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | 100-TQFP (14x14) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 100-LQFP | Number of I/O | 79 | Voltage | 1.14 V - 1.26 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | ROHS3 Compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 264 | Number of Logic Elements/Cells | 2112 | ||
| Number of Gates | N/A | ECCN | EAR99 | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 75776 |
Overview of LCMXO2-2000HE-6TG100C – MachXO2 Field Programmable Gate Array (FPGA) IC, 79 I/O, 75,776 bits RAM, 2,112 logic elements, 100-LQFP
The LCMXO2-2000HE-6TG100C is a MachXO2 family FPGA offering 2,112 logic elements and approximately 75,776 bits of on-chip RAM in a 100-pin LQFP package. Designed as a low-power, non-volatile FPGA, it provides a flexible logic architecture and a broad set of on-chip peripherals suitable for control, interface bridging and system integration in commercial applications.
This device combines a compact surface-mount package with 79 general I/O pins, a single-chip non-volatile configuration approach and low standby power characteristics, enabling designers to implement glue logic, memory interfaces and display or I/O-intensive functions while minimizing external components.
Key Features
- Core Logic – 2,112 logic elements providing a flexible LUT-based architecture suitable for implementing combinatorial and sequential logic functions.
- Embedded Memory – Approximately 75,776 bits of total on-chip RAM to support FIFOs, small buffers and soft-state storage.
- I/O Capacity and Flexibility – 79 I/O pins available in the 100-pin package; programmable I/O buffer options and programmable pull modes support varied interface needs.
- On-Chip Non-volatile Memory – Family-level support for on-chip user Flash memory and background programming capabilities, enabling instant-on operation and secure single-chip configuration.
- Low Power – Implements an advanced low-power process with family-level standby power as low as 22 μW and multiple power-saving modes.
- Clocking and PLLs – Flexible on-chip clocking resources including primary clocks and PLL options for fractional-n frequency synthesis and a wide input frequency range.
- Embedded Peripherals – Hardened system functions on the family level such as SPI, I2C and timer/counter blocks for common control tasks.
- Package and Mounting – Surface-mount 100-LQFP package; supplier device package listed as 100-TQFP (14 × 14).
- Electrical and Environmental – Supply voltage range listed as 1.14 V to 1.26 V and operating temperature range 0 °C to 85 °C. RoHS compliant.
Typical Applications
- Display and Video Interfaces – Use the MachXO2 family’s source-synchronous I/O and gearing features to manage display timing and parallel/DDR interfaces.
- Memory Interface Control – Implement dedicated DDR/DDR2/LPDDR style memory logic and FIFO buffering using the device’s embedded RAM and dedicated FIFO control logic.
- System Glue Logic – Replace discrete logic with a compact FPGA for protocol translation, bus bridging and I/O aggregation using the 79 available I/Os.
- Configuration and Control – Leverage on-chip Flash and hardened SPI/I2C blocks to store configuration or act as a light-weight control subsystem.
Unique Advantages
- Non-volatile, instant-on operation: On-chip user Flash enables single-chip configuration and rapid power-up without external configuration memory.
- Compact integration: 2,112 logic elements and 79 I/Os in a 100-pin surface-mount package reduce BOM and PCB real estate compared with multi-chip solutions.
- Low standby power: Family-level low-power design supports micro-watt standby modes to minimize idle energy consumption.
- Versatile I/O standards support: Programmable I/O buffer features and on-chip termination options provide interface flexibility for mixed-signal systems.
- Embedded peripherals: Built-in SPI, I2C and timer/counter blocks reduce the need for additional controller ICs for common system functions.
- Commercial-grade robustness: Specified for commercial operation with a 0 °C to 85 °C ambient temperature range and RoHS compliance.
Why Choose LCMXO2-2000HE-6TG100C?
The LCMXO2-2000HE-6TG100C positions itself as a compact, low-power, non-volatile FPGA option for commercial designs that require flexible logic, embedded memory and a range of on-chip peripherals. With 2,112 logic elements, approximately 75,776 bits of RAM and 79 I/Os in a 100-pin surface-mount package, it is well suited for designers seeking to consolidate glue logic, memory interface control and display or I/O handling into a single device.
Its family-level features—on-chip Flash, low standby power, programmable I/O behavior and hardened SPI/I2C/timer functions—provide a scalable platform for long-term designs that benefit from reduced component count, simplified configuration and a broad set of integration options.
Request a quote or submit a product inquiry to obtain pricing, availability and lead-time details for the LCMXO2-2000HE-6TG100C.

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