LCMXO3L-1300E-5UWG36CTR50
| Part Description |
MachXO3 Field Programmable Gate Array (FPGA) IC 28 65536 1280 36-UFBGA, WLCSP |
|---|---|
| Quantity | 53 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Lattice Semiconductor Corporation |
| Manufacturing Status | Discontinued |
| Manufacturer Standard Lead Time | 20 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | 36-WLCSP (2.54x2.59) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 36-UFBGA, WLCSP | Number of I/O | 28 | Voltage | 1.14 V - 1.26 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | ROHS3 Compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 1 (Unlimited) | Number of LABs/CLBs | 160 | Number of Logic Elements/Cells | 1280 | ||
| Number of Gates | N/A | ECCN | EAR99 | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 65536 |
Overview of LCMXO3L-1300E-5UWG36CTR50 – MachXO3 Field Programmable Gate Array (FPGA) IC, 28 I/O, 65,536 bits RAM, 1,280 logic elements, 36-UFBGA WLCSP
The LCMXO3L-1300E-5UWG36CTR50 is a MachXO3 family Field Programmable Gate Array (FPGA) in a 36‑WLCSP (2.54 × 2.59 mm) package. It delivers 1,280 logic elements and 65,536 bits of embedded RAM with 28 programmable I/O pins, targeting compact commercial embedded designs that require non-volatile configuration and flexible I/O integration.
Designed around the MachXO3 architecture, the device provides on-chip memory, programmable I/O, and family-level features such as multi-time non-volatile configuration and embedded IP blocks, enabling space-constrained systems to consolidate glue logic, interface functions, and control tasks.
Key Features
- Core Logic — 1,280 logic elements for implementing glue logic, state machines, and small- to mid-scale programmable functions.
- Embedded Memory — 65,536 bits of on-chip RAM for local buffering, FIFOs, and small data structures.
- Programmable I/O — 28 I/O pins delivered in flexible banks to support interface and signal conditioning requirements.
- Non‑volatile Configuration — MachXO3 family capability for multi-time programmable, non-volatile configuration (family-level feature), enabling instant-on and field reconfiguration.
- Clocking and Timing — Family-level support for on-chip oscillators and PLLs for flexible clocking and synchronous interfaces.
- Embedded Hardened IP (Family) — Datasheet describes hardened IP such as I²C, SPI, and timer/counter blocks available across the MachXO3 family to accelerate common functions.
- Package and Mounting — 36‑WLCSP package (2.54 × 2.59 mm) with surface-mount mounting type for compact PCB implementations.
- Power — Supply voltage range specified at 1.14 V to 1.26 V to match low-voltage system rails.
- Commercial Grade — Rated for operation from 0 °C to 85 °C and RoHS compliant for standard commercial applications.
Typical Applications
- Interface and I/O Bridging — Use the device to implement protocol adapters, level translation support, and compact I/O expansion with on-chip RAM for buffering.
- System Control and Glue Logic — Implement control state machines, reset sequencing, and custom logic between peripherals and processors using the programmable logic and embedded memory.
- Consumer and Commercial Electronics — Integrate compact logic functions, user-interface handling, and peripheral interfacing in space-constrained products where a small WLCSP package is advantageous.
Unique Advantages
- Compact, low-profile packaging: The 36‑WLCSP (2.54 × 2.59 mm) package enables high-density board designs and reduced PCB footprint.
- Integrated memory and logic: 1,280 logic elements and 65,536 bits of embedded RAM reduce the need for external components and simplify board-level design.
- Low-voltage operation: 1.14–1.26 V supply range aligns with modern low-voltage systems to ease power-rail management.
- Family-level hardened IP and clocking: On-chip oscillators, PLLs, and available hardened interfaces (I²C, SPI, timers) accelerate development and shorten time-to-market.
- Non‑volatile, multi-time programmable configuration: MachXO3 family configuration options enable field updates and persistent behavior without external configuration memory.
- RoHS compliant and commercial temperature rating: Suitable for mainstream commercial deployments with 0 °C to 85 °C operating range.
Why Choose LCMXO3L-1300E-5UWG36CTR50?
This MachXO3 family FPGA balances compact packaging, integrated memory, and a practical logic capacity to address space- and cost-sensitive commercial designs. Its combination of 1,280 logic elements, 65,536 bits of on-chip RAM, and 28 programmable I/Os makes it well-suited for interface consolidation, glue logic, and control tasks where a small WLCSP form factor and non-volatile configuration are important.
Engineers building compact embedded systems will find the LCMXO3L-1300E-5UWG36CTR50 provides an efficient way to reduce BOM complexity while leveraging MachXO3 family-level features such as hardened peripheral IP and flexible clocking to accelerate development and support field-updatable designs.
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