LCMXO640C-5FT256C
| Part Description |
MachXO Field Programmable Gate Array (FPGA) IC 159 640 256-LBGA |
|---|---|
| Quantity | 930 Available (as of October 8, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Lattice Semiconductor Corporation |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 256-FTBGA (17x17) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 256-LBGA | Number of I/O | 159 | Voltage | 1.71 V - 3.465 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 80 | Number of Logic Elements/Cells | 640 | ||
| Number of Gates | N/A | ECCN | EAR99 | HTS Code | 8542.39.0001 | ||
| Qualification | N/A |
Overview of LCMXO640C-5FT256C – MachXO FPGA, 640 Logic Elements, 159 I/O, 256-LBGA
The LCMXO640C-5FT256C is a MachXO family field programmable gate array (FPGA) in a 256-ball BGA package designed for commercial applications. It combines non-volatile, instant-on operation with reconfigurable FPGA-style logic, delivering 640 logic elements and up to 159 I/O to address glue logic, bus bridging, control logic and related system functions.
Built for single-chip system integration, this device supports in-field reconfiguration, sleep-mode static current reduction, and a flexible I/O buffer set compatible with a range of signaling standards while operating across a wide supply voltage range.
Key Features
- Core Logic 640 logic elements (LUT-based) for implementing glue logic, control state machines, and moderate-density FPGA functions.
- Memory Approximately 6.1 Kbits of distributed RAM (MachXO640 family specification) for small embedded storage and distributed data buffering; no embedded block SRAM in this density point.
- I/O and Interfaces 159 programmable I/O pins with a flexible sysIO buffer supporting multiple interface standards including LVCMOS (3.3/2.5/1.8/1.5/1.2), LVTTL, PCI, LVDS, Bus-LVDS, LVPECL and RSDS.
- Non-Volatile, Instant-On Single-chip, non-volatile configuration provides instant-on operation and removes the need for external configuration memory; supports secure designs without exposed bitstreams.
- Reconfiguration Supports in-field reconfiguration and TransFR™ Reconfiguration (TFR) for updating SRAM-based logic while the system operates.
- Low-Power Modes Sleep mode enables substantial static current reduction for power-sensitive applications.
- Power Supply Operates over a supply range of 1.71 V to 3.465 V to accommodate mixed-voltage system environments.
- Package and Mounting Surface-mount 256-ball BGA (supplier device package: 256-FTBGA, 17×17 mm; package case: 256-LBGA).
- Commercial Temperature Grade Rated for 0 °C to 85 °C operating temperature and RoHS compliant.
- System Support Family-level features include JTAG programmability, background non-volatile programming, and standard system-level support for boundary scan and in-system programming.
Typical Applications
- Glue Logic Implement combinational glue logic and control paths to simplify PCB routing and reduce discrete logic components.
- Bus Bridging and Interfacing Bridge and adapt between bus protocols or voltage domains using the device’s flexible I/O and reconfigurable logic.
- Power-Up and System Control Manage power sequencing, reset control and startup behavior with non-volatile instant-on capability for fast system availability.
- Control Logic Replace multiple CPLDs or small FPGAs with a single-device implementation for state machines, peripheral control, and I/O aggregation.
Unique Advantages
- Single-chip non-volatile solution: Eliminates external configuration memory and enables instant-on operation for faster system boot.
- Secure configuration: No external bitstream to intercept, supporting higher design security for embedded systems.
- High I/O-to-logic density: 159 I/Os paired with 640 logic elements simplifies board-level integration where many signals must be aggregated or translated.
- Flexible reconfiguration: TransFR™ capability and JTAG programmability allow in-field updates and background non-volatile programming.
- Broad interfacing support: Programmable sysIO buffers support a wide range of signaling standards to interface with diverse peripherals.
- Power and mounting flexibility: Wide supply voltage range and compact 256-ball BGA package support mixed-voltage designs and space-constrained boards.
Why Choose LCMXO640C-5FT256C?
The LCMXO640C-5FT256C is positioned for designers who need a compact, non-volatile FPGA that combines instant-on behavior, flexible I/O, and moderate logic density. It is well suited for replacing discrete glue logic, implementing bus adapters, and consolidating control functions into a single surface-mount package while maintaining design security and in-field reconfigurability.
With family-proven system features—such as background programming, sleep mode for static current reduction, and a versatile I/O buffer set—this MachXO device offers a practical balance of integration, configurability, and deployment-ready characteristics for commercial embedded designs.
Request a quote or submit an inquiry to receive pricing and availability for the LCMXO640C-5FT256C.

Date Founded: 1983
Headquarters: Hillsboro, Oregon, USA
Employees: 1,000+
Revenue: $627.7 Million
Certifications and Memberships: ISO9001:2015, ISO14001:2015, IATF16949:2016