LIF-MD6000-6UWG36ITR50

IC FPGA 17 I/O 36WLCSP
Part Description

CrossLink™ Field Programmable Gate Array (FPGA) IC 17 184320 5936 36-UFBGA, WLCSP

Quantity 504 Available (as of October 7, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerLattice Semiconductor Corporation
Manufacturing StatusDiscontinued
Manufacturer Standard Lead Time8 Weeks
Datasheet

Specifications & Environmental

Device Package36-WLCSP (2.54x2.59)GradeIndustrialOperating Temperature-40°C – 100°C
Package / Case36-UFBGA, WLCSPNumber of I/O17Voltage1.14 V - 1.26 V
Mounting MethodSurface MountRoHS ComplianceROHS3 CompliantREACH ComplianceREACH Unaffected
Moisture Sensitivity Level1 (Unlimited)Number of LABs/CLBs1484Number of Logic Elements/Cells5936
Number of GatesN/AECCNEAR99HTS Code8542.39.0001
QualificationN/ATotal RAM Bits184320

Overview of LIF-MD6000-6UWG36ITR50 – CrossLink™ Field Programmable Gate Array (FPGA) IC, 5936 logic elements

The LIF-MD6000-6UWG36ITR50 is a CrossLink™ family FPGA in a compact 36-WLCSP (2.54 × 2.59 mm) package designed for industrial applications. It provides 5,936 logic elements and approximately 0.18 Mbits of embedded RAM in a low‑profile, surface‑mount footprint, with an operating range from -40 °C to 100 °C and a nominal supply window of 1.14 V to 1.26 V.

Built on the CrossLink architecture, this device integrates programmable fabric with dedicated I/O and system blocks described in the CrossLink datasheet (MIPI D‑PHY blocks, programmable I/O banks, sysI/O buffers, PLLs and a power management unit), delivering a reprogrammable, space‑efficient building block for industrial embedded designs.

Key Features

  • Logic Fabric 5,936 logic elements for custom logic and control functions, enabling flexible implementation of application‑specific logic within a compact device.
  • Embedded Memory Approximately 0.18 Mbits of on‑chip RAM (184,320 total bits) for frame buffering, small FIFOs, or state storage.
  • Programmable I/O and Dedicated PHYs Includes programmable I/O banks and documented CrossLink family blocks such as MIPI D‑PHY and sysI/O buffers (see datasheet sections on MIPI D‑PHY Blocks and sysI/O), supporting varied signal standards and interface configurations.
  • Clocking and Timing CrossLink family clocking structure and sysCLK PLL are included in the device architecture, providing internal clock management and timing resources as described in the datasheet.
  • Power Management Integrated Power Management Unit (PMU) functionality in the CrossLink architecture supports controlled power states and sequencing documented in the datasheet.
  • Package and Mounting 36‑UFBGA / 36‑WLCSP surface‑mount package (2.54 × 2.59 mm) for space‑constrained PCBs and compact board designs.
  • Industrial Grade Temperature Rated for industrial temperature operation from -40 °C to 100 °C to meet demanding environmental conditions.
  • Low‑Voltage Supply Operates from a 1.14 V to 1.26 V supply range, suitable for low‑voltage system architectures.
  • Compliance RoHS‑compliant for regulatory and environmental compatibility.
  • I/O Count 17 I/O pins available for external connectivity and interfacing needs.

Typical Applications

  • Industrial Embedded Control — Compact FPGA logic and industrial temperature rating make this device suitable for embedded controllers and industrial automation modules.
  • Sensor and Interface Bridging — Programmable I/O banks and MIPI D‑PHY blocks in the CrossLink family support flexible interface adaptation and signal conditioning for sensor front ends.
  • Compact Board Designs — The 36‑WLCSP package and surface‑mount mounting type enable space‑efficient implementations on small PCBs and module assemblies.

Unique Advantages

  • Compact, production‑ready package: 36‑WLCSP (2.54 × 2.59 mm) provides a small footprint for space‑constrained designs while supporting surface‑mount assembly.
  • Industrial temperature operation: −40 °C to 100 °C rating addresses harsh operating environments without sacrificing reprogrammability.
  • Balanced logic and memory: 5,936 logic elements paired with ~0.18 Mbits of embedded RAM deliver a balance suited for control logic, buffering, and small data structures.
  • Low‑voltage operation: 1.14–1.26 V supply reduces system power domains and aligns with low‑voltage system architectures.
  • CrossLink family system blocks: Architecture includes dedicated blocks (MIPI D‑PHY, programmable I/O, PLLs, PMU) documented in the CrossLink datasheet to simplify integration of common system functions.
  • RoHS compliant: Meets environmental compliance requirements for modern manufacturing processes.

Why Choose LIF-MD6000-6UWG36ITR50?

The LIF-MD6000-6UWG36ITR50 offers a compact, industrial‑grade CrossLink FPGA option when you need moderate logic capacity, on‑chip RAM, and dedicated system blocks in a WLCSP footprint. Its low‑voltage operation, industrial temperature range, and documented CrossLink architecture (including MIPI D‑PHY and programmable I/O resources) make it well suited to embedded designs that require reprogrammable logic with tight space and power constraints.

This part is a practical choice for engineers and procurement teams targeting industrial embedded systems, compact interface modules, and designs that leverage the CrossLink family’s integrated system blocks for efficient implementation and reduced external BOM.

Request a quote or submit a parts inquiry to receive pricing, lead‑time, and availability details for the LIF-MD6000-6UWG36ITR50. Our team can provide the technical and purchasing information you need to move your design forward.

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