OMAPL138EZWTQ5R

IC MPU OMAP-L1X 361NFBGA
Part Description

ARM926EJ-S Microprocessor IC OMAP-L1x 1 Core, 32-Bit 361-NFBGA (16x16)

Quantity 1,517 Available (as of October 8, 2026)
Product CategoryMicroprocessors
Part SeriesOMAP-L13x
ManufacturerTexas Instruments
Manufacturing StatusActive
Manufacturer Standard Lead Time26 Weeks
Datasheet

Specifications & Environmental

Co-Processors/DSPSignal Processing; C674x, System Control; CP15Core ProcessorARM926EJ-SDevice Package361-NFBGA (16x16)
Display & Interface ControllersLCDECCNN/AEthernet10/100Mbps (1)
Graphics AccelerationNoHTS CodeN/AMoisture Sensitivity Level3 (168 Hours)
Mounting MethodSurface MountMounting TypeSurface MountNumber of Cores/Bus Width1 Core, 32-Bit
Operating Temperature–Package / Case361-LFBGARAM ControllersDDR2, LPDDR
REACH ComplianceREACH UnknownRoHS ComplianceROHS3 CompliantSATASATA 3Gbps (1)
Security FeaturesBoot Security, CryptographySupplier Device Package361-NFBGA (16×16)USBUSB 1.1 + PHY (1), USB 2.0 + PHY (1)
Voltage – I/O1.8V, 3.3V

Overview of OMAPL138EZWTQ5R – IC MPU OMAP-L1X 361NFBGA

The OMAPL138EZWTQ5R is an OMAP-L13x family device combining an ARM926EJ-S RISC MPU with a TMS320C674x signal-processing co-processor. It is supplied in a 361-ball NFBGA (16 × 16 mm) surface-mount package and targets embedded applications that require both control processing and DSP-class signal performance.

With integrated memory controllers, a broad set of high-speed interfaces and on-chip security features, this device provides a compact, highly integrated platform for designs that need mixed control, connectivity and signal-processing capability.

Key Features

  • Processing Subsystem ARM926EJ-S RISC MPU with 32-bit execution; paired with a TMS320C674x VLIW DSP offering fixed- and floating-point signal processing extensions and high compute throughput.
  • DSP Performance C674x DSP architecture supporting up to 3648 MIPS and 2746 MFLOPS as documented for the series, with multiple ALU and floating-point functional units for signal and numeric workloads.
  • Memory Architecture Two-level cache and on-chip RAM: L1 program/data blocks and L2 unified memory (including 32KB L1P, 32KB L1D, 256KB L2 as shown in the series datasheet) plus 128KB shared RAM and 64KB ROM for boot/vector storage.
  • External Memory Support EMIFA supporting NOR/NAND and 16-bit SDRAM, and a DDR2/mDDR memory controller supporting 16-bit DDR2/16-bit mDDR configurations.
  • High-Speed Interfaces Integrated Ethernet 10/100 Mbps, SATA 3 Gbps, USB 1.1 and USB 2.0 with PHYs, and an LCD controller for display connectivity.
  • Peripheral and I/O Set Multiple UARTs (three configurable 16550-type with FIFOs), two SPI ports, HPI and additional interfaces for flexible peripheral integration.
  • DMA and System Throughput Enhanced DMA (EDMA3) with multiple transfer controllers and up to 64 independent DMA channels to offload data movement and optimize system performance.
  • Security and Boot On-chip boot security and cryptography features to support secure system boot and data protection.
  • I/O Voltage Options Selectable 1.8-V or 3.3-V LVCMOS I/Os (USB and DDR2 interfaces excepted), enabling flexible board-level interfacing.
  • Packaging 361-ball LFBGA / 361-NFBGA (16 × 16 mm) surface-mount package for compact system integration.
  • Software Support Series-level support includes TI DSP BIOS, Chip Support Library and DSP Library to aid firmware development and algorithm deployment.
  • Graphics Integrated LCD controller available; no dedicated graphics acceleration engine is provided.

Typical Applications

  • Industrial Automation — Embedded control and real-time signal processing where Ethernet connectivity and DMA-assisted data movement enable responsive system control.
  • Communications and Networking — Protocol processing and data handling for equipment that requires 10/100 Mbps Ethernet, USB and SATA connectivity.
  • Multimedia and Audio Processing — DSP compute capability and LCD interfacing for devices that combine user interfaces with real-time audio or video signal processing.
  • Storage and Data Acquisition — On-chip SATA plus high-throughput DMA and external memory support for embedded storage controllers and data-logging systems.

Unique Advantages

  • Integrated MPU + DSP: Combines an ARM926EJ-S control processor with a C674x DSP co-processor to consolidate control and heavy signal-processing tasks on a single silicon platform, reducing board-level complexity.
  • Broad Peripheral Set: Ethernet, SATA, USB 1.1/2.0 with PHYs, UARTs and SPI provide flexible connectivity options for diverse embedded systems.
  • Flexible Memory Options: On-chip caches and multiple external memory interfaces (EMIFA, DDR2/mDDR) support a wide range of memory configurations and performance targets.
  • Hardware Security and Boot: Built-in boot security and cryptographic features help protect system integrity from power-up through runtime.
  • High Data Movement Efficiency: EDMA3 with numerous channels and controllers reduces CPU load for high-throughput streaming and peripheral transfers.
  • Compact BGA Package: 361-ball NFBGA (16 × 16 mm) offers a high-density, surface-mount footprint for space-constrained embedded designs.

Why Choose OMAPL138EZWTQ5R?

OMAPL138EZWTQ5R positions itself as an integrated MPU + DSP platform for embedded designs that require both control processing and significant signal-compute capability. Its combination of ARM926EJ-S processing, TMS320C674x DSP resources, flexible memory interfaces and extensive peripheral set enables consolidated system designs with fewer external components.

Engineers and procurement teams building industrial, communications or multimedia embedded products can leverage the device’s on-chip DMA, security features and software support (TI DSP BIOS and libraries) to accelerate development and maintain long-term product robustness.

Request a quote or submit an inquiry to obtain pricing, availability and lead-time information for OMAPL138EZWTQ5R.

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