AT6010-4QC

IC FPGA 108 I/O 132BQFP
Part Description

AT6000(LV) Field Programmable Gate Array (FPGA) IC 108 6400 132-BQFP Bumpered

Quantity 871 Available (as of October 7, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerMicrochip Technology
Manufacturing StatusObsolete
Manufacturer Standard Lead TimeContact Us
Datasheet

Specifications & Environmental

Device Package132-BQFP (27.44x27.44)GradeCommercialOperating Temperature0°C – 70°C
Package / Case132-BQFP BumperedNumber of I/O108Voltage4.75 V - 5.25 V
Mounting MethodSurface MountRoHS ComplianceRoHS non-compliantREACH ComplianceREACH Unaffected
Moisture Sensitivity Level3 (168 Hours)Number of LABs/CLBsN/ANumber of Logic Elements/Cells6400
Number of Gates30000ECCN3A991DHTS Code8542.39.0001
QualificationN/A

Overview of AT6010-4QC – AT6000(LV) Field Programmable Gate Array (FPGA) IC 108 6400 132-BQFP Bumpered

The AT6010-4QC is an SRAM-based Field Programmable Gate Array from the AT6000(LV) family, offering a symmetrical array architecture optimized for reconfigurable coprocessor and compute‑intensive logic implementations. The device delivers up to 6,400 registers and approximately 30,000 usable gates in a 132‑pin bumpered BQFP package (27.44 × 27.44 mm).

Designed for commercial applications, the AT6010-4QC supports high system speeds and flexible I/O control while operating from a 4.75 V to 5.25 V supply and a 0 °C to 70 °C operating range, making it suitable for embedded acceleration, adaptive hardware, and high‑speed logic tasks.

Key Features

  • Core Architecture — Symmetrical Cell Array: A grid of small, efficient logic cells provides dense functional packing and a simple, high‑speed busing network for medium and long distance communication across the array.
  • Logic Capacity: Up to 6,400 registers (cells) and approximately 30,000 usable gates for implementing compute‑intensive logic and custom hard macro functions.
  • Performance: System speeds greater than 100 MHz with flip‑flop toggle rates above 250 MHz; input delay as low as 1.2 ns and typical output delay specifications available in the series datasheet.
  • Programmable I/O: Independently configurable I/O with TTL/CMOS input thresholds, open‑collector/tristate outputs, programmable slew‑rate control, and 16 mA drive per pin (combinable up to 64 mA).
  • In‑System Reconfiguration & Adaptive Hardware: Support for complete or partial in‑system reconfiguration without loss of data or machine state enables on‑the‑fly functionality changes and hardware acceleration.
  • Power Characteristics: Low standby currents (series values indicated at 500 μA/200 μA) and typical operating currents in the series range from 15 to 170 mA depending on device and configuration.
  • Package & Mounting: 132‑pin Bumpered BQFP surface mount package (132‑BQFP, 27.44 × 27.44 mm) for reliable board mounting and routing.
  • Commercial Temperature Grade: Rated for 0 °C to 70 °C operation to meet commercial application requirements.

Typical Applications

  • Reconfigurable Coprocessors: Implement hardware acceleration and offload compute‑intensive tasks using the device’s large logic capacity and in‑system reconfiguration.
  • Compute‑Intensive Logic: Ideal for algorithms and custom pipelines that require high toggling rates and multi‑column clocking to maintain throughput.
  • Adaptive Hardware & Acceleration: Use cache logic and reusable custom hard macros to create adaptive processing elements that can be updated in the field.
  • Embedded Control & Interface Logic: Programmable I/O with TTL/CMOS thresholds and adjustable drive makes the device suitable for complex glue logic and interface functions in commercial systems.

Unique Advantages

  • Flexible Reconfiguration: Complete or partial in‑system reconfiguration allows design updates and feature extensions without removing the device from the board.
  • High Logic Density: 6,400 cells and ~30,000 gates provide substantial on‑chip logic for consolidating functions and reducing BOM count.
  • Deterministic Performance: Series‑specified system speeds >100 MHz and tight clock skew control support predictable timing for high‑speed designs.
  • Robust I/O Controls: Independently configurable I/O with programmable slew and drive options simplifies interfacing to a wide range of external logic and buses.
  • Commercial‑Grade Reliability: Surface mount 132‑BQFP package and commercial temperature rating make the device suited to mainstream embedded product lines.

Why Choose AT6010-4QC?

The AT6010-4QC combines a high‑performance symmetrical cell array with in‑system reconfiguration and flexible I/O, delivering a platform well suited for embedded designs that require hardware acceleration and adaptive logic. With a substantial logic resource count and series‑documented performance characteristics, this device is positioned for commercial applications that need reconfigurable compute capacity in a board‑level surface mount package.

Designers and procurement teams seeking a commercial‑grade FPGA option with proven architecture and on‑the‑fly configurability will find the AT6010-4QC offers scalability and functional density supported by the AT6000(LV) series development ecosystem.

Request a quote or submit a pricing inquiry to check availability and integrate the AT6010-4QC into your next design cycle.

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