AT6010A-2AU
| Part Description |
AT6000(LV) Field Programmable Gate Array (FPGA) IC 120 6400 144-LQFP |
|---|---|
| Quantity | 1,408 Available (as of October 8, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Microchip Technology |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 8 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | 144-LQFP (20x20) | Grade | Industrial | Operating Temperature | -40°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 144-LQFP | Number of I/O | 120 | Voltage | 4.5 V - 5.5 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | ROHS3 Compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | N/A | Number of Logic Elements/Cells | 6400 | ||
| Number of Gates | 30000 | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A |
Overview of AT6010A-2AU – AT6000(LV) Field Programmable Gate Array (FPGA) IC, 120 I/O, 6,400 Logic Elements, 144-LQFP
The AT6010A-2AU from Microchip Technology is an SRAM-based FPGA in the AT6000(LV) series designed for reconfigurable coprocessing and compute-intensive logic. Built around a symmetrical array of small, efficient logic cells and a flexible busing network, the device supports in-system reconfiguration and adaptive hardware implementations.
This industrial-grade, surface-mount device in a 144-LQFP (20 × 20 mm) package delivers high-speed operation suitable for designs requiring system clocks beyond 100 MHz, robust I/O configurability, and low standby current for power-sensitive applications.
Key Features
- High-performance timing – System speeds greater than 100 MHz and flip-flop toggle rates above 250 MHz enable high-speed digital processing.
- Logic capacity – Approximately 6,400 logic elements (cells) and 30,000 usable gates provide substantial combinational and sequential resources for medium-to-large designs.
- Register resources – Up to 6,400 registers are available for state storage and pipelining.
- I/O flexibility – 120 user I/Os with independently configurable I/O supporting TTL/CMOS input thresholds, open-collector/tristate outputs, programmable slew-rate control, and 16 mA drive (combinable to 64 mA).
- In-system reconfiguration – Supports complete and partial in-system reconfiguration without loss of data or machine state, enabling field updates and adaptive logic.
- Clocking and synchronization – Independently controlled column clocks and resets with clock skew less than 1 ns across the chip for consistent timing across the array.
- Low-power operation – Very low standby current (specified as 500 µA / 200 µA) and typical operating current ranges from 15 mA to 170 mA depending on device and usage.
- Package and mounting – Surface-mount 144-LQFP (20×20) packaging suitable for standard SMT assembly processes.
- Voltage and temperature – Voltage supply specified at 4.5 V to 5.5 V and rated for industrial operating temperatures from −40 °C to 85 °C.
- Embedded memory – Total on-chip RAM bits: 0 (no dedicated embedded RAM bits reported for this part).
- Proven architecture – Symmetrical array with local and express busing and repeaters for efficient routing and predictable performance.
Typical Applications
- Reconfigurable coprocessors: Accelerate compute-intensive tasks by offloading logic to a reprogrammable FPGA fabric with in-system reconfiguration.
- Hardware acceleration: Implement cache-logic-style adaptive hardware for algorithms that benefit from hardware-level speed improvements.
- High-speed digital systems: Use in systems requiring operation above 100 MHz with tightly controlled clock skew and predictable timing.
- Field-updatable logic: Systems that require partial or complete in-field reconfiguration while preserving machine state and data.
Unique Advantages
- High-speed signaling capability: Enables designs that require fast clocking and rapid flip-flop switching for improved throughput.
- Substantial logic and register density: 6,400 logic elements and up to 6,400 registers provide room for complex designs without immediate migration to larger families.
- Flexible, programmable I/O: Wide range of I/O options and drive strengths simplify interface design with diverse peripherals and bus standards.
- In-system reconfiguration: Allows hardware updates and design evolution in deployed systems without complete power-down or state loss.
- Industrial temperature rating: −40 °C to 85 °C operation supports industrial applications requiring extended temperature tolerance.
- Low standby current: Minimizes power draw in idle states, supporting power-sensitive designs.
Why Choose AT6010A-2AU?
The AT6010A-2AU combines the AT6000(LV) series' symmetrical cell array and efficient busing network with substantial logic capacity and robust I/O configurability to address reconfigurable coprocessing and hardware acceleration needs. Its support for in-system partial or complete reconfiguration and low-power standby characteristics make it suitable for designs that need field updates and energy-conscious operation.
This industrial-grade, surface-mount FPGA in a 144-LQFP package is well suited to engineering teams seeking a proven, medium-density FPGA with predictable timing, flexible I/O, and the ability to evolve hardware functionality after deployment.
Request a quote or submit a procurement inquiry today through your preferred procurement channel or authorized distributor to evaluate the AT6010A-2AU for your next reconfigurable design.

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