EP1K30TC144-2N
| Part Description |
ACEX-1K® Field Programmable Gate Array (FPGA) IC 102 24576 1728 144-LQFP |
|---|---|
| Quantity | 1,748 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 144-TQFP (20x20) | Grade | Commercial | Operating Temperature | 0°C – 70°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 144-LQFP | Number of I/O | 102 | Voltage | 2.375 V - 2.625 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 216 | Number of Logic Elements/Cells | 1728 | ||
| Number of Gates | 119000 | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 24576 |
Overview of EP1K30TC144-2N – ACEX-1K® Field Programmable Gate Array (FPGA), 1,728 logic elements, 24,576-bit RAM, 144-LQFP
The EP1K30TC144-2N is an Intel ACEX-1K family FPGA delivering a mid-density programmable logic platform with 1,728 logic elements and 24,576 bits of embedded RAM. Designed for commercial applications, it provides a compact, reconfigurable solution for system-on-a-programmable-chip (SOPC) integration, embedded memory functions and general-purpose logic implementation.
With 102 user I/O pins, a 144-pin LQFP surface-mount package, and an internal 2.5 V supply operating within an external 2.375 V to 2.625 V range, this device balances integration and board-level flexibility for volume designs that require embedded memory and predictable I/O behavior.
Key Features
- Core logic 1,728 logic elements (LEs) providing arrayed resources for combinational and sequential logic; device-level capacity corresponds to up to 119,000 system gates.
- Embedded memory Approximately 24,576 bits of on-chip RAM implemented across embedded array blocks (EABs) suitable for dual-port memory and buffering functions.
- I/O and voltage support 102 user I/O pins and MultiVolt I/O capability from the ACEX-1K family; the device operates with an internal 2.5 V supply and an external voltage supply range of 2.375 V to 2.625 V.
- Package and mounting 144-pin LQFP package in a surface-mount form factor; supplier package listed as 144-TQFP (20×20 mm) for PCB footprint planning.
- Configuration and test In-circuit reconfigurability and built-in JTAG boundary-scan test (BST) support for board-level programming and test without consuming user logic.
- Clocking and interconnect Family-level features include low-skew clock distribution, options for clock delay/boost, and a predictable FastTrack interconnect structure for reliable timing behavior.
- Arithmetic and logic primitives Dedicated carry and cascade chains accelerate arithmetic functions, adders and high-fan-in logic implementations.
- Regulatory and grade RoHS compliant and specified for commercial operating temperatures from 0 °C to 70 °C.
Typical Applications
- System-on-a-board integration Programmable SOPC glue logic and peripheral integration where embedded RAM and moderate logic capacity streamline board-level functions.
- Communications and protocol bridging Custom protocol interfacing, buffering and control logic in communications products that benefit from on-chip memory and reconfigurable logic.
- Embedded memory and buffering Dual-port memory emulation, FIFOs and temporary data storage using the device’s embedded RAM blocks for local buffering needs.
- Mixed-voltage I/O interfacing I/O tasks that require flexible signaling levels and programmable output behavior in mixed-voltage environments.
Unique Advantages
- Balanced integration of logic and memory: 1,728 logic elements paired with 24,576 bits of embedded RAM provide a compact platform for combining control logic and local data storage on a single device.
- Flexible I/O and voltage handling: 102 user I/O pins and family MultiVolt I/O capability enable interfacing with multiple device voltage domains while using a 2.5 V internal core.
- Board-level test and reconfiguration: Built-in JTAG boundary-scan and in-circuit reconfigurability simplify production test flows and field updates without consuming user logic resources.
- Predictable timing and arithmetic support: Low-skew clock networks, dedicated carry/cascade chains and FastTrack interconnects help realize efficient arithmetic and timing-critical functions.
- Compact surface-mount package: 144-LQFP (surface mount) footprint supports high-density board designs while maintaining accessible I/O for routing and prototyping.
- RoHS-compliant commercial solution: Suited for volume commercial designs with documented temperature and supply ranges (0 °C to 70 °C; 2.375 V–2.625 V).
Why Choose EP1K30TC144-2N?
The EP1K30TC144-2N offers a pragmatic balance of logic density, embedded memory and I/O flexibility for commercial designs that need on-chip RAM and reconfigurable logic without the overhead of larger devices. Its ACEX-1K family features—such as predictable interconnect, dedicated arithmetic chains and in-circuit reconfigurability—make it well suited to SOPC integration, protocol bridging and embedded buffering roles.
Choose this device when you require a RoHS-compliant, surface-mount FPGA with defined commercial temperature and supply ranges, straightforward board-level testability via JTAG, and the integration advantages of combined logic and embedded memory resources.
Request a quote or submit your procurement inquiry to evaluate EP1K30TC144-2N for your next design. Our team can provide pricing and availability information tailored to your project needs.

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