EP2S90F1020C4N
| Part Description |
Stratix® II Field Programmable Gate Array (FPGA) IC 758 4520488 90960 1020-BBGA |
|---|---|
| Quantity | 15 Available (as of October 8, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 1020-FBGA (33x33) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 1020-BBGA | Number of I/O | 758 | Voltage | 1.15 V - 1.25 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS Compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 4548 | Number of Logic Elements/Cells | 90960 | ||
| Number of Gates | N/A | ECCN | 3A001A7A | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 4520488 |
Overview of EP2S90F1020C4N – Stratix® II FPGA, 90960 logic elements, 1020-BBGA
The EP2S90F1020C4N is a Stratix® II field programmable gate array (FPGA) in a 1020-BBGA (1020-FBGA, 33×33) package from Intel (Altera). This high-density FPGA delivers 90,960 logic elements and abundant on-chip resources for designs that require significant logic capacity, embedded memory, and extensive I/O.
Documented in the Stratix II Device Handbook, this device targets designs that leverage integrated DSP blocks, advanced I/O structures, and flexible clocking and PLL resources for applications needing high-speed interfaces and on-chip memory integration.
Key Features
- Core Logic 90,960 logic elements provide high logic density for complex digital designs and system integration.
- Embedded Memory Approximately 4.52 Mbits of on-chip RAM (4,520,488 total RAM bits) to support buffering, FIFOs, and memory-intensive logic functions.
- I/O Capacity 758 available I/O pins supporting a broad set of interfacing requirements and high pin-count connectivity.
- High‑Speed I/O & Interface Support Device handbook documentation includes high-speed differential I/O support, double data rate I/O pins, on‑chip termination, and multi‑voltage I/O interface guidance.
- DSP & Memory Blocks Stratix II architecture includes dedicated digital signal processing blocks and TriMatrix memory structures referenced in the device handbook for signal processing and memory interfacing.
- Clocking & PLLs Comprehensive PLL and clock network coverage in the datasheet supports advanced clocking schemes and phase-locked loop configurations.
- Configuration & Test Features documented include IEEE 1149.1 JTAG boundary-scan support, SignalTap II embedded logic analyzer, and multiple configuration schemes.
- Package & Power Surface-mount 1020-BBGA package (1020-FBGA, 33×33) with recommended supply voltage range of 1.15 V to 1.25 V for core operation.
- Commercial Grade & Environmental Commercial temperature grade with an operating range of 0 °C to 85 °C and RoHS compliance.
Typical Applications
- High‑performance communications — Implement high-speed serial interfaces and protocol processing using the device’s high-speed I/O and PLL resources.
- Digital signal processing — Leverage dedicated DSP blocks and on-chip memory for real‑time signal conditioning, filtering, and buffering.
- Memory interface controllers — Use TriMatrix memory and external RAM interfacing guidance from the device handbook to implement memory controllers and high-bandwidth data paths.
- Prototyping and system integration — High logic density and extensive I/O make the device suitable for consolidating multiple functions onto a single FPGA during development or product integration.
Unique Advantages
- High logic density: 90,960 logic elements enable integration of complex functions and multiple subsystems on a single device.
- Substantial embedded memory: Approximately 4.52 Mbits of on-chip RAM reduces dependence on external memory for many buffering and storage needs.
- Large I/O count: 758 I/O pins provide flexibility for high‑pin‑count interfaces and system connectivity.
- Comprehensive clocking: Detailed PLL and clock network documentation supports advanced timing architectures and multi‑clock-domain designs.
- Established device documentation: The Stratix II Device Handbook provides in-depth guidance on architecture, I/O standards, configuration, and performance parameters for engineering confidence.
- Commercial and compliant: Surface-mount 1020-BBGA packaging, commercial temperature rating (0 °C to 85 °C), and RoHS compliance support standard production environments.
Why Choose EP2S90F1020C4N?
The EP2S90F1020C4N combines high logic capacity, substantial embedded memory, and a very large I/O complement in a 1020‑BBGA package, making it a strong choice for designs that require dense logic integration, on‑chip memory resources, and broad interfacing capability. The Stratix II device handbook documents advanced features such as DSP blocks, enhanced I/O standards, and flexible PLL and clocking options that support demanding signal processing and high-speed interface applications.
This device is suited to engineering teams and procurement organizations seeking a commercial‑grade, RoHS‑compliant FPGA for applications that benefit from the Stratix II architecture and the available technical documentation and configuration features.
Request a quote or submit an inquiry to obtain pricing and availability for the EP2S90F1020C4N.

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