EP2S90F1020C3
| Part Description |
Stratix® II Field Programmable Gate Array (FPGA) IC 758 4520488 90960 1020-BBGA |
|---|---|
| Quantity | 1,179 Available (as of October 8, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 1020-FBGA (33x33) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 1020-BBGA | Number of I/O | 758 | Voltage | 1.15 V - 1.25 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 4548 | Number of Logic Elements/Cells | 90960 | ||
| Number of Gates | N/A | ECCN | 3A001A7A | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 4520488 |
Overview of EP2S90F1020C3 – Stratix® II Field Programmable Gate Array (FPGA) IC 758 4520488 90960 1020-BBGA
The EP2S90F1020C3 is a Stratix II family FPGA providing a high-density programmable logic fabric in a 1020-ball FBGA package. It combines a large logic capacity with substantial on-chip RAM and an extensive I/O complement, making it suitable for designs that require dense digital integration and high I/O counts.
Built around the Stratix II architecture, this device targets applications that benefit from significant embedded memory (approximately 4.52 Mbits), 90,960 logic elements, and up to 758 I/O pins while operating from a 1.15 V to 1.25 V core supply within a commercial 0 °C to 85 °C range.
Key Features
- Logic Capacity — 90,960 logic elements to implement large combinational and sequential logic networks.
- Embedded Memory — Approximately 4.52 Mbits of on-chip RAM for FIFOs, buffers, and local data storage.
- High I/O Count — Up to 758 I/O pins to support wide external interfaces and multi-channel connectivity.
- Stratix II Architecture — Family-level features documented in the Stratix II Device Handbook, including logic array blocks, ALMs, DSP resources, and multi-track interconnect.
- Clocking and PLLs — On-chip PLLs and hierarchical clocking resources as described in the device handbook for flexible clock management.
- Configuration & Debug Support — JTAG boundary-scan and embedded logic analyzer capabilities referenced in the Stratix II documentation.
- Power and Mounting — Surface-mount FBGA package with a 1.15 V to 1.25 V core supply requirement.
- Package — 1020-ball FBGA (33 × 33) / 1020-BBGA package case for compact board-level integration.
- Commercial Operating Range — Specified for 0 °C to 85 °C operation; RoHS compliant.
Typical Applications
- High-density digital processing — Implement complex state machines, protocol stacks, and custom logic using the device’s large logic element count and embedded memory.
- Signal processing and DSP — Leverage the Stratix II digital signal processing resources and on-chip RAM for filtering, packet processing, and data path acceleration.
- Multi-channel interface hubs — Support numerous parallel or serial interfaces with up to 758 I/Os for connectivity and bridging functions.
- Embedded system integration — Combine logic, memory, and clock-management resources to consolidate functions and reduce external component count.
Unique Advantages
- High logic density: 90,960 logic elements enable consolidation of complex designs into a single device, reducing board-level routing complexity.
- Substantial on-chip memory: Approximately 4.52 Mbits of embedded RAM provide local storage for buffers, packet queues, and DSP data paths.
- Extensive I/O capacity: Up to 758 I/Os allow broad external connectivity without additional multiplexing hardware.
- Robust device architecture: Stratix II family features—documented in the device handbook—include advanced clocking, DSP blocks, and a flexible interconnect fabric for diverse design needs.
- Compact package: 1020-ball FBGA (33 × 33) package offers a high pin-count solution in a space-efficient footprint for surface-mount assembly.
- Compliance and operating range: RoHS-compliant construction and a commercial operating range (0 °C to 85 °C) suitable for typical commercial electronics applications.
Why Choose EP2S90F1020C3?
The EP2S90F1020C3 delivers a balance of large programmable logic capacity, significant on-chip memory, and high I/O density within the Stratix II architecture. Its documented feature set—covering logic array blocks, DSP resources, PLLs, and configuration/debug facilities—makes it a practical choice for projects that require substantial digital processing and heavy interface integration while maintaining a compact board footprint.
This device is well suited for engineering teams and procurement teams targeting commercial electronics that demand integrated logic and memory resources, flexible clocking, and broad I/O support. Detailed technical guidance is available in the Stratix II Device Handbook referenced in the product documentation.
Request a quote or submit a procurement inquiry to secure EP2S90F1020C3 for your next design.

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