LAV-AT-G70-1LFG1156C
| Part Description |
Avant™-G Field Programmable Gate Array (FPGA) IC 554 4239360 637000 1156-BBGA, FCBGA |
|---|---|
| Quantity | 884 Available (as of October 7, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Lattice Semiconductor Corporation |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 8 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | 1156-FCBGA (35x35) | Grade | Commercial | Operating Temperature | 0°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 1156-BBGA, FCBGA | Number of I/O | 554 | Voltage | 820 mV | ||
| Mounting Method | Surface Mount | RoHS Compliance | ROHS3 Compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | N/A | Number of LABs/CLBs | N/A | Number of Logic Elements/Cells | 637000 | ||
| Number of Gates | N/A | ECCN | N/A | HTS Code | N/A | ||
| Qualification | N/A | Total RAM Bits | 4239360 |
Overview of LAV-AT-G70-1LFG1156C – Avant™-G Field Programmable Gate Array (FPGA), 637,000 logic elements, 554 I/Os, 1156-FCBGA
The LAV-AT-G70-1LFG1156C is an Avant™-G Field Programmable Gate Array (FPGA) IC from Lattice Semiconductor, built on the Avant platform architecture. It delivers high logic capacity and a large programmable I/O complement in a 1156-ball FCBGA package for surface-mount assembly.
Designed for commercial-temperature applications, this device is aimed at designs that require substantial on-chip logic, abundant I/O, integrated memory resources, and flexible clocking and interface capabilities as described in the Avant platform documentation.
Key Features
- Core Logic 637,000 logic element cells provide high user logic capacity for complex digital designs.
- Embedded Memory Approximately 4.24 Mbits of total on-chip RAM, with sysMEM features such as single/dual/pseudo-dual port modes, FIFO support, and memory cascading described in the Avant platform overview.
- I/O Capacity 554 programmable I/O pins to support dense external connectivity requirements.
- Clocking and Timing Comprehensive clocking architecture including on-chip oscillator, PLL, global and regional clocks, dynamic clock control, and clock synchronizers as documented for the Avant platform.
- High-Speed Interfaces Platform-level support for SERDES/PMA blocks, multi-protocol PCS and PHY integration, and DDR memory PHY functionality as noted in the Avant platform documentation.
- Configuration and Diagnostics Enhanced configuration options, JTAG support, SEU handling approaches, and trace ID capabilities are included in the platform overview.
- Package and Mounting 1156-ball FCBGA package (1156-FCBGA, 35×35) in a surface-mount form factor for board-level assembly.
- Electrical and Environmental Supply voltage specified at 820 mV; commercial operating temperature range from 0 °C to 85 °C. RoHS compliant.
- Grade Commercial grade device for mainstream embedded and communications designs.
Typical Applications
- High-density digital processing Use the large logic fabric and embedded memory for compute- or control-intensive functions within commercial embedded systems.
- Interface bridging and protocol conversion Leverage the extensive I/O count and platform SERDES/PCS capabilities to implement protocol translation and multi-interface hubs.
- Memory-centric logic Take advantage of sysMEM features and DDR PHY support for designs that require on-chip buffering, FIFOs, and memory interfacing.
Unique Advantages
- High logic density: 637,000 logic elements enable large combinational and sequential designs without external logic.
- Substantial embedded memory: Approximately 4.24 Mbits of on-chip RAM with flexible operating modes (single/dual/pseudo-dual port, FIFO, cascading) for data buffering and state storage.
- Extensive I/O resources: 554 programmable I/Os support dense peripheral and interface requirements on a single device.
- Comprehensive clocking: On-chip oscillator, PLLs, and multiple clock domain options provide versatile timing and synchronization capabilities described in the Avant platform.
- Compact, serviceable package: 1156-FCBGA (35×35) surface-mount package balances high pin-count integration with board-level manufacturability.
- Platform-level features: Built on the Avant platform, offering documented support for SERDES, DDR PHY, sysDSP, and configuration/diagnostic mechanisms important for complex designs.
Why Choose LAV-AT-G70-1LFG1156C?
The LAV-AT-G70-1LFG1156C combines a high logic element count, substantial embedded memory, and a very large I/O complement in a commercial-temperature FPGA package. It is positioned for engineers developing complex, I/O-intensive commercial applications that benefit from the Avant platform architecture’s clocking, memory, and high-speed interface capabilities.
For teams seeking a scalable, platform-based FPGA solution with documented architectural features—such as programmable functional units, sysMEM and sysDSP support, SERDES/PMA blocks, and flexible configuration options—this device provides a dense integration point suitable for a wide range of embedded designs.
Request a quote or submit an inquiry for the LAV-AT-G70-1LFG1156C to discuss availability, pricing, and lead times.

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