LCMXO1200E-4B256C

IC FPGA 211 I/O 256CABGA
Part Description

MachXO Field Programmable Gate Array (FPGA) IC 211 9421 1200 256-LFBGA, CSPBGA

Quantity 1,425 Available (as of May 5, 2026)
Product CategoryField Programmable Gate Array (FPGA)
ManufacturerLattice Semiconductor Corporation
Manufacturing StatusObsolete
Manufacturer Standard Lead TimeRFQ
Datasheet

Specifications & Environmental

Device Package256-CABGA (14x14)GradeCommercialOperating Temperature0°C – 85°C
Package / Case256-LFBGA, CSPBGANumber of I/O211Voltage1.14 V - 1.26 V
Mounting MethodSurface MountRoHS ComplianceRoHS non-compliantREACH ComplianceREACH Unaffected
Moisture Sensitivity Level3 (168 Hours)Number of LABs/CLBs150Number of Logic Elements/Cells1200
Number of GatesN/AECCN3A991DHTS Code8542.39.0001
QualificationN/ATotal RAM Bits9421

Overview of LCMXO1200E-4B256C – MachXO Field Programmable Gate Array (FPGA), 1200 logic elements, 211 I/Os

The LCMXO1200E-4B256C is a MachXO family non-volatile FPGA optimized for glue logic, bus bridging/interfacing, power-up control and general control logic. It combines instant-on non-volatile configuration with FPGA-style LUT-based logic and embedded memory to deliver a single-chip, reconfigurable control solution for commercial embedded systems.

Designed for high pin-to-pin integration, this device provides 1200 logic elements, approximately 9.4 Kbits of on-chip RAM, and 211 I/Os in a 256-ball LFBGA/CABGA package. It operates from a 1.14 V–1.26 V core supply and is rated for commercial temperature operation (0 °C to 85 °C).

Key Features

  • Non-volatile, infinitely reconfigurable — Instant-on device that requires no external configuration memory and supports reconfiguration of SRAM-based logic in milliseconds.
  • Fast startup and field updates — Instant-on power-up behavior and TransFR™ in-field reconfiguration enable updates while the system operates.
  • Logic capacity — 1200 logic elements provide a compact fabric for glue logic, protocol translation and control functions.
  • On-chip memory — Approximately 9.4 Kbits of embedded RAM for distributed and block memory needs.
  • High I/O count — 211 programmable I/Os to support dense interfacing and board-level connectivity.
  • Flexible I/O buffer support — Family-level support for LVCMOS (3.3/2.5/1.8/1.5/1.2), LVTTL, PCI, LVDS, Bus-LVDS, LVPECL and RSDS interfaces (as provided by the MachXO family).
  • Clock management — Includes analog PLL capability for clock multiply/divide and phase shifting (1 PLL for the LCMXO1200 device family member).
  • System-level support — JTAG programmability, IEEE 1149.1 boundary scan and IEEE 1532 in-system programming support; background programming of non-volatile memory is supported.
  • Package and mounting — Surface-mount 256-ball LFBGA / CABGA (14 × 14 mm) package for compact board integration.
  • Commercial grade and RoHS compliant — Rated for 0 °C to 85 °C operation and RoHS compliant.

Typical Applications

  • Glue Logic and Board-Level Control — Implement bus arbitration, address decoding and control-state machines using the device’s LUT-based logic and on-chip RAM.
  • Bus Bridging and Interfacing — Bridge or translate between interfaces with 211 I/Os and flexible I/O buffer support for multiple signaling standards.
  • Power-Up and Reset Control — Instant-on, single-chip non-volatile configuration provides predictable startup behavior for system sequencing and power management.
  • Field-Upgradable Control Logic — In-field TransFR™ reconfiguration allows updating logic while the system remains operational.

Unique Advantages

  • Single-chip, instant-on configuration: Eliminates the need for external configuration memory, simplifying BOM and accelerating system startup.
  • High I/O-to-logic density: 211 I/Os paired with 1200 logic elements enable compact implementations of dense interface logic without large FPGAs.
  • On-chip memory for buffering and state: Approximately 9.4 Kbits of embedded RAM supports small FIFOs, state storage and distributed memory needs.
  • Field reconfiguration support: TransFR™ and background programming let you update non-volatile configuration and SRAM logic with minimal system disruption.
  • Established tool support: MachXO devices are supported by ispLEVER design tools for synthesis, place-and-route and timing verification (family-level support noted in the MachXO data sheet).
  • Compact, surface-mount package: 256-ball LFBGA/CABGA (14 × 14 mm) simplifies board layout for space-constrained designs.

Why Choose LCMXO1200E-4B256C?

The LCMXO1200E-4B256C sits at the intersection of CPLD-style instant-on behavior and FPGA-style programmable logic. With 1200 logic elements, roughly 9.4 Kbits of embedded RAM, and 211 I/Os in a compact 256-ball package, it is suited for designers who need a single-chip, reconfigurable control solution for glue logic, bus interfacing and power sequencing in commercial applications. Its non-volatile architecture, JTAG and IEEE-standard programming support, and family toolchain compatibility make it a pragmatic choice for designs that require reliable startup, in-field updates and compact board-level integration.

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