M1A3P600-2FGG144I
| Part Description |
ProASIC3 Field Programmable Gate Array (FPGA) IC 97 110592 144-LBGA |
|---|---|
| Quantity | 694 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Microchip Technology |
| Manufacturing Status | Active |
| Manufacturer Standard Lead Time | 12 Weeks |
| Datasheet |
Specifications & Environmental
| Device Package | 144-FPBGA (13x13) | Grade | Industrial | Operating Temperature | -40°C – 100°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 144-LBGA | Number of I/O | 97 | Voltage | 1.425 V - 1.575 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | ROHS3 Compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 13824 | Number of Logic Elements/Cells | 13824 | ||
| Number of Gates | 600000 | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 110592 |
Overview of M1A3P600-2FGG144I – ProASIC3 FPGA, 97 I/Os, 144-LBGA
The M1A3P600-2FGG144I is a ProASIC3 series flash-based Field Programmable Gate Array (FPGA) from Microchip Technology. It provides a reprogrammable, nonvolatile FPGA fabric with a balance of logic capacity, on-chip memory, and mixed-voltage I/O for system-level integration in industrial applications.
This device is suited to designs requiring instant-on nonvolatile configuration, flexible I/O interfacing, and a compact 144-LBGA package. Key value propositions include secure in-system programming, on-chip memory resources, and industrial temperature operation.
Key Features
- Logic Capacity — 13,824 logic elements delivering approximately 600,000 system gates for mid-density FPGA designs.
- On-Chip Memory — 110,592 bits of embedded RAM available for user logic and buffering; includes 1 kbit of on-chip FlashROM for nonvolatile storage (as described for the ProASIC3 family).
- I/O and Flexibility — 97 user I/O pins with support for mixed-voltage operation and a variety of single-ended and differential I/O standards described for the family.
- Clocking and PLLs — Integrated clock conditioning circuitry with Phase-Locked Loop (PLL) support to implement configurable clocking and phase shift capabilities (family-level feature).
- Security and In-System Programming — Supports secure in-system programming workflows with on-chip AES decryption for encrypted bitstreams (family-level feature).
- Power and Supply — Core supply range of 1.425 V to 1.575 V for low-power core operation.
- Package and Mounting — 144-LBGA (144-FPBGA, 13×13) surface-mount package optimized for compact board footprints.
- Industrial Temperature Grade — Rated for operation from −40°C to 100°C for industrial environments.
- Compliance — RoHS compliant.
Typical Applications
- Instant-on Control Systems — Nonvolatile flash configuration enables systems that require immediate availability after power-up.
- Secure In-System Updates — Encrypted in-system programming workflows protect FPGA configuration in deployed equipment.
- Mixed-Voltage Interface Designs — Flexible I/O and bank-selectable voltages support interfacing to diverse logic families and external devices.
Unique Advantages
- Nonvolatile, Reprogrammable Configuration: Flash-based architecture retains programmed design when powered off, simplifying boot and system management.
- Balanced Logic and Memory: 13,824 logic elements combined with 110,592 bits of embedded RAM enable mid-density designs with on-chip buffering and state storage.
- Secure Deployment: Family-level AES-based in-system programming provides a mechanism to protect bitstreams during field updates.
- Industrial Robustness: Rated for −40°C to 100°C operation and supplied in a compact 144-LBGA package for reliable use in industrial applications.
- Flexible Clocking: Integrated clock conditioning and PLL capabilities support multiple clocking schemes required by synchronous designs.
Why Choose M1A3P600-2FGG144I?
The M1A3P600-2FGG144I offers a pragmatic combination of logic capacity, embedded memory, and secure flash-based configuration in a compact industrial-grade package. It is targeted at designs that require nonvolatile instant-on behavior, flexible I/O, and robust field programmability.
Engineers selecting this device benefit from a field-proven ProASIC3 family architecture with on-chip FlashROM, clock conditioning, and secure in-system programming options—providing long-term design scalability and deployment flexibility.
If you would like pricing, availability, or to submit a quote request for M1A3P600-2FGG144I, please request a quote or contact sales through your usual purchasing channels.

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