MPC859DSLVR50A
| Part Description |
MPC8xx Microprocessor IC MPC8xx 1 Core, 32-Bit 50MHz 357-PBGA (25x25) |
|---|---|
| Quantity | 993 Available (as of October 8, 2026) |
| Product Category | Microprocessors |
|---|---|
| Part Series | MPC859 |
| Manufacturer | NXP USA Inc. |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Co-Processors/DSP | Communications; CPM | Core Processor | MPC8xx | Device Package | 357-PBGA (25x25) | ||
|---|---|---|---|---|---|---|---|
| ECCN | 5A991B4B | Ethernet | 10Mbps (1), 10/100Mbps (1) | Graphics Acceleration | No | ||
| HTS Code | 8542.31.0001 | Moisture Sensitivity Level | 3 (168 Hours) | Mounting Method | Surface Mount | ||
| Mounting Type | Surface Mount | Number of Cores/Bus Width | 1 Core, 32-Bit | Operating Temperature | 0°C ~ 95°C (TA) | ||
| Package / Case | 357-BBGA | RAM Controllers | DRAM | REACH Compliance | REACH Unaffected | ||
| RoHS Compliance | ROHS3 Compliant | Speed | 50MHz | Supplier Device Package | 357-PBGA (25×25) | ||
| Voltage – I/O | 3.3V |
Overview of MPC859DSLVR50A – IC MPU MPC8XX 50MHZ 357BGA
The MPC859DSLVR50A is a single-chip microprocessor from the MPC8xx family featuring an embedded single-issue, 32‑bit PowerPC core running at 50 MHz. It combines CPU, on-chip memory management and caches, communications co‑processing, and peripheral controllers to serve a range of embedded and networking applications.
Designed for controller and communications systems, the device integrates Ethernet interfaces, DRAM controller support and serial/peripheral interfaces while operating from 3.3 V I/O and a consumer-grade temperature range of 0 °C to 95 °C.
Key Features
- Core Embedded single-issue, 32‑bit PowerPC core implemented in the MPC8xx family running at 50 MHz.
- Caches and MMU Two-way set-associative caches (4-Kbyte instruction cache and 4-Kbyte data cache for MPC859DSL) and an MMU with a 32-entry TLB to support virtual memory and efficient code/data handling.
- Communications Co-processor (CPM) On-chip communications processor module for handling serial and communications tasks, with enhanced ATM functionality noted for the MPC859 family.
- Ethernet Dual Ethernet capability with one 10 Mbps port and one 10/100 Mbps port to support mixed-speed network interfaces.
- Memory and Controllers Integrated DRAM controller support to interface with external memory for system and application data storage.
- Interfaces Standard peripheral interfaces including I2C and serial communications controlled by the CPM for device management and peripheral connectivity.
- Power and I/O 3.3 V I/O voltage compatibility for common embedded system designs.
- Package and Mounting Surface-mount 357-PBGA package (25 × 25 mm) for compact board-level integration.
- Operating Range Consumer-grade operating temperature range from 0 °C to 95 °C.
- RoHS Compliant Device is compliant with RoHS requirements.
Typical Applications
- Networking Equipment Use as a control and communications processor in routers, switches or access devices where dual Ethernet interfaces and CPM-managed serial ports are required.
- Telecommunications / ATM Systems Suitable for ATM-enabled functions and communication protocol handling leveraging the MPC859 family’s enhanced ATM capabilities.
- Embedded Controllers Integration of CPU, DRAM controller and peripheral interfaces makes it appropriate for industrial and commercial controller applications.
- Gateway and Interface Devices Acts as a bridge or protocol processor in gateway devices that require mixed-speed Ethernet connectivity and serial peripheral management.
Unique Advantages
- Integrated Communications Co-processor: The on-chip CPM offloads serial and communications tasks from the CPU, simplifying system design and reducing external component count.
- Dual Ethernet Support: One 10 Mbps and one 10/100 Mbps Ethernet interface enable flexible deployment in mixed-speed network environments.
- Compact BGA Package: 357-PBGA (25 × 25 mm) surface-mount package supports high-density PCB layouts while providing robust connectivity and thermal characteristics for embedded boards.
- Memory Subsystem: On-chip DRAM controller and cache/MMU features (including a 32-entry TLB) facilitate efficient memory management for real-time and communication workloads.
- Industry-Standard I/O Voltage: 3.3 V I/O compatibility aligns with common peripheral devices and board-level power architectures.
- Consumer Temperature Rating: Operates across 0 °C to 95 °C for a wide range of commercial and industrial indoor environments.
Why Choose MPC859DSLVR50A?
The MPC859DSLVR50A positions itself as a versatile, integrated processor for embedded and communications applications where a compact footprint, on-chip communications resources and dual Ethernet interfaces are required. Its PowerPC-based core, cache and MMU features provide deterministic code and data handling suited to controller and network protocol tasks.
This part is ideal for designers seeking a single-chip solution that reduces external components while providing the peripheral set and memory interfaces needed for routers, gateways, telecom modules and embedded controllers. RoHS compliance and a standard 3.3 V I/O simplify integration into existing product designs.
Request a quote or submit an RFQ to get pricing and availability for the MPC859DSLVR50A. Our team will respond with detailed lead-time and ordering information.

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