AT40K40-2BQI
| Part Description |
AT40K/KLV Field Programmable Gate Array (FPGA) IC 114 18432 2304 144-LQFP |
|---|---|
| Quantity | 832 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Microchip Technology |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 144-LQFP (20x20) | Grade | Industrial | Operating Temperature | -40°C – 85°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 144-LQFP | Number of I/O | 114 | Voltage | 4.5 V - 5.5 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 2304 | Number of Logic Elements/Cells | 2304 | ||
| Number of Gates | 50000 | ECCN | 3A991D | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 18432 |
Overview of AT40K40-2BQI – AT40K/KLV Field Programmable Gate Array (FPGA) IC, 114 I/O, ~18,432 bits RAM, 2,304 logic elements, 144-LQFP
The AT40K40-2BQI is an SRAM-based FPGA in a 144-LQFP (20×20) surface-mount package designed for industrial applications. It implements 2,304 logic elements with approximately 18,432 bits of distributed on-chip RAM and up to 114 I/O pins, enabling reconfigurable digital logic, on-chip memory and high-density interfacing in a single device.
Built for high-performance and flexible system design, this device targets compute- and I/O-intensive tasks such as DSP coprocessing, multimedia processing and general-purpose embedded logic where in-system re-programmability, fast memory access and multi-clock distribution are required.
Key Features
- Core Logic – 2,304 logic elements (cells) providing support for up to 50,000 usable gates suitable for mid-range FPGA designs.
- Embedded Memory (FreeRAM) – Approximately 18,432 bits of distributed, flexible 10 ns SRAM that can be used as single- or dual-port, synchronous or asynchronous memory for FIFOs, scratch pads and coefficient storage.
- I/O and Voltage – 114 I/O pins with 3V/5V capability described in the family; this device is specified for a 5 V supply range of 4.5 V to 5.5 V.
- Clocking – Up to 8 global clocks with low-skew distribution, programmable edge polarity and dedicated PCI clocks for multi-clock system partitioning and low-power management.
- Performance – System speeds reported to 100 MHz with array multipliers performing above 50 MHz and 10 ns SRAM access for high-throughput arithmetic and data-path operations.
- Dynamic Reconfigurability (Cache Logic) – Support for full/partial in-system re-configurability to update logic or coefficients without losing device data, enabling adaptive designs and fast vector multiplier updates.
- Package & Mounting – 144-LQFP (20×20) surface-mount package suitable for standard PCB assembly and industrial-grade operating conditions.
- Operating Range & Reliability – Industrial-grade device with operating temperature from –40°C to 85°C and RoHS compliance.
- Design Ecosystem – Family-level support for industry-standard design tools and automatic component generators for DSP and system-level IP integration.
Typical Applications
- DSP Coprocessing – Implement FIR filters, FFTs, convolvers and other arithmetic-intensive functions using the device’s array multipliers and on-chip SRAM for coefficient and data storage.
- Video and Multimedia Processing – Use the reconfigurable logic and embedded memory to accelerate video compression, decompression and transform algorithms (DCT, FFT) in system designs.
- High-density I/O and System Glue – Leverage 114 I/O pins and programmable output drive to implement bus interfacing, protocol conversion and high-speed peripheral control.
- Adaptive and Reconfigurable Systems – Take advantage of in-system partial/full reconfiguration to update algorithms or system functions in deployed hardware without full device replacement.
Unique Advantages
- Flexible On-chip Memory: Distributed 10 ns FreeRAM provides low-latency single- or dual-port memory independent of logic resources, simplifying FIFO and buffer implementations.
- Multi-clock Architecture: Eight global clocks and dedicated PCI clocks enable clean partitioning of timing domains and scalable performance across complex designs.
- Reconfigurability for Adaptive Designs: Cache Logic allows full or partial in-system reconfiguration so systems can be updated or optimized in the field.
- Industrial Temperature Range: Specified operation from –40°C to 85°C makes the device suitable for demanding environmental conditions.
- Standard Package Footprint: 144-LQFP package eases PCB layout and assembly while supporting a dense pin count and robust mechanical footprint.
- Toolchain Integration: Family-level support for industry-standard synthesis, simulation and placement/routing tools helps shorten time-to-market.
Why Choose AT40K40-2BQI?
The AT40K40-2BQI offers a balanced combination of mid-range logic capacity, fast embedded SRAM and comprehensive clocking features in an industrial-grade 144-LQFP package. Its reprogrammable SRAM-based architecture and Cache Logic capability make it a practical choice for systems that require in-field updates, DSP acceleration and flexible I/O handling.
This device is well suited for engineers and designers building industrial and multimedia systems that need deterministic memory access, multi-clock management and the ability to evolve hardware functionality without full hardware replacement. The product’s compatibility with industry-standard design tools and reusable IP generators supports efficient development and long-term design scalability.
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