EP1SGX25CF672I6
| Part Description |
Stratix® GX Field Programmable Gate Array (FPGA) IC 455 1944576 25660 672-BBGA |
|---|---|
| Quantity | 415 Available (as of May 5, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | RFQ |
| Datasheet |
Specifications & Environmental
| Device Package | 672-FBGA (27x27) | Grade | Industrial | Operating Temperature | -40°C – 100°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 672-BBGA | Number of I/O | 455 | Voltage | 1.425 V - 1.575 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | RoHS non-compliant | REACH Compliance | REACH Unknown | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 2566 | Number of Logic Elements/Cells | 25660 | ||
| Number of Gates | N/A | ECCN | 3A001A7A | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 1944576 |
Overview of EP1SGX25CF672I6 – Stratix® GX Field Programmable Gate Array (FPGA) IC 455 1944576 25660 672-BBGA
The EP1SGX25CF672I6 is an Intel Stratix® GX family FPGA supplied in a 672-ball BGA package. It combines a high-performance logic array with the Stratix GX family’s high-speed serial transceiver capabilities and is offered in an industrial-grade device with surface-mount packaging.
This device targets high-bandwidth, protocol-bridging and communications-oriented designs, providing 25,660 logic elements, approximately 1.94 Mbits of embedded RAM, and 455 general-purpose I/O for system integration and external interfacing.
Key Features
- Logic Density — 25,660 logic elements for implementing complex FPGA logic, state machines, and custom processing pipelines.
- Embedded Memory — Approximately 1.94 Mbits of on-chip RAM to support buffers, FIFOs and data storage without external memory for many functions.
- I/O Capacity — 455 I/O pins to support wide parallel interfaces, multiple differential channels, and extensive peripheral connectivity.
- High‑Speed Serial Transceivers (family feature) — Stratix GX transceiver technology in the family supports clock-data recovery and full‑duplex operation from 500 Mbps to 3.1875 Gbps, enabling high-bandwidth serial links and protocol support typical of the family.
- Programmable Logic Architecture — Built on the Stratix architecture with a 1.5‑V logic array (family-level) that supports advanced FPGA functions and timing resources.
- Clocking and DSP Resources (family feature) — Family-level features include multiple PLLs and dedicated DSP blocks for multiply-accumulate and FIR implementations to accelerate signal processing tasks.
- Package & Mounting — 672-ball BGA package (supplier device package: 672-FBGA, 27×27) designed for surface-mount assembly in dense board layouts.
- Power and Temperature — Core supply range of 1.425 V to 1.575 V and an operating temperature range of −40 °C to 100 °C suitable for industrial applications.
- Compliance — RoHS compliant.
Typical Applications
- High‑Speed Communications — Implement protocol bridging, packet processing, and serializer/deserializer logic using the Stratix GX transceiver family features and on-chip RAM.
- Backplane and Chip‑to‑Chip Interfaces — Use the device’s high I/O count and serial transceiver capabilities to implement high-bandwidth backplane and board-to-board links.
- Signal Processing — Leverage logic density, embedded RAM, and family DSP blocks for real-time data path and filtering tasks in industrial systems.
- Protocol Conversion and Aggregation — Deploy in systems that require consolidating multiple interfaces or converting between serial and parallel protocols.
Unique Advantages
- Substantial Logic Capacity: 25,660 logic elements provide headroom for complex control, datapath, and custom accelerator designs without immediate need for additional ASICs.
- Integrated Memory Resources: Approximately 1.94 Mbits of embedded RAM reduces dependency on external memory for many buffering and FIFO requirements, simplifying board design.
- Extensive I/O Connectivity: 455 I/O pins enable broad peripheral support and flexible partitioning of high-speed and general-purpose signals.
- Industrial Temperature Range: Rated for −40 °C to 100 °C operation to meet a wide range of industrial environmental requirements.
- Family-Level Transceiver Capability: Stratix GX family transceivers support multi‑Gbps serial links and protocol features useful in high-throughput networking and communications designs.
- Board-Level Packaging: 672-ball BGA in a 27×27 supplier footprint enables dense, high-pin-count board layouts while remaining surface-mount compatible.
Why Choose EP1SGX25CF672I6?
EP1SGX25CF672I6 positions itself as a high-density, industrial-grade FPGA option within the Stratix GX family, combining 25,660 logic elements, substantial embedded RAM, and a large I/O complement to address demanding communications and signal-processing designs. The device’s package, power range, and temperature rating support deployment in industrial systems where space, integration, and environmental tolerance matter.
Engineers designing high-bandwidth links, protocol bridges, or complex datapaths will find this device suited to scalable implementations that leverage the Stratix GX family’s transceiver and architecture features while benefiting from Intel’s FPGA ecosystem and family-level capabilities.
Request a quote or submit a purchase inquiry to evaluate EP1SGX25CF672I6 for your next high-performance communications or industrial FPGA design.

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