EP20K1000EFI672-2X
| Part Description |
APEX-20KE® Field Programmable Gate Array (FPGA) IC 508 327680 38400 672-BBGA |
|---|---|
| Quantity | 1,337 Available (as of October 8, 2026) |
| Product Category | Field Programmable Gate Array (FPGA) |
|---|---|
| Manufacturer | Intel |
| Manufacturing Status | Obsolete |
| Manufacturer Standard Lead Time | Contact Us |
| Datasheet |
Specifications & Environmental
| Device Package | 672-FBGA (27x27) | Grade | Industrial | Operating Temperature | -40°C – 100°C | ||
|---|---|---|---|---|---|---|---|
| Package / Case | 672-BBGA | Number of I/O | 508 | Voltage | 1.71 V - 1.89 V | ||
| Mounting Method | Surface Mount | RoHS Compliance | Unknown | REACH Compliance | REACH Unaffected | ||
| Moisture Sensitivity Level | 3 (168 Hours) | Number of LABs/CLBs | 3840 | Number of Logic Elements/Cells | 38400 | ||
| Number of Gates | 1772000 | ECCN | 3A001A2A | HTS Code | 8542.39.0001 | ||
| Qualification | N/A | Total RAM Bits | 327680 |
Overview of EP20K1000EFI672-2X – APEX-20KE Field Programmable Gate Array, 672-BBGA
The EP20K1000EFI672-2X is an Intel APEX-20KE family FPGA delivered in a 672-ball BGA package. It implements a MultiCore architecture that integrates look-up table (LUT) logic, product-term logic and embedded memory blocks for system-on-a-programmable-chip style designs.
With 38,400 logic elements, approximately 0.328 Mbits of embedded memory and 508 user I/Os, this industrial-grade device targets high-density logic, memory‑intensive and I/O‑rich applications that require flexible clocking and multi-voltage I/O support.
Key Features
- Core Architecture MultiCore architecture combining LUT-based logic and product-term logic to implement both register- and combinatorial-intensive functions (APEX 20K family feature).
- Logic Capacity 38,400 logic elements providing a high-density programmable fabric suitable for complex logic integration.
- Embedded Memory Approximately 0.328 Mbits of on-chip RAM available for FIFOs, dual-port RAM and other memory functions via embedded system blocks (ESBs).
- I/O and Interface 508 user I/O pins and family-level MultiVolt I/O interface support for interfacing with 1.8 V, 2.5 V, 3.3 V and 5.0 V devices (family feature).
- Clock Management Flexible clock circuitry including support for phase-locked loops (PLLs), multiple global clocks, ClockLock and ClockBoost features (APEX 20K family).
- Performance Scale Device density equivalent to 1,772,000 system gates (as specified for this part), enabling larger integration on a single device.
- Power and Supply Internal supply operating range 1.71 V to 1.89 V for core power.
- Package & Mounting 672-ball BGA package (supplier device package listed as 672-FBGA, 27×27) optimized for surface-mount assembly.
- Industrial Temperature Range Rated for operation from −40 °C to 100 °C and specified as industrial grade.
- Compliance RoHS compliant.
Typical Applications
- Embedded Systems / SOPC Integration Implement system-on-a-programmable-chip functions using the integrated LUT logic and embedded system blocks for memory and buffering.
- High‑Density Digital Logic Consolidate complex control and processing logic into a single FPGA using 38,400 logic elements and high gate count.
- Memory Interface and Buffers Use embedded RAM and ESB capabilities for FIFOs, dual-port RAM and other on-chip buffering in memory‑intensive designs.
- High‑Pin I/O and Multi‑Voltage Interfacing Drive dense board-level connectivity and interface with a range of voltage domains using 508 I/Os and the family’s MultiVolt I/O support.
Unique Advantages
- High integration density: 38,400 logic elements and a gate-scale of 1,772,000 enable significant consolidation of discrete logic and peripherals.
- On-chip memory for system functions: Approximately 0.328 Mbits of embedded RAM and ESB architecture allow implementation of FIFOs and dual-port memories without external components.
- Flexible I/O and interfacing: 508 I/Os combined with family-level MultiVolt support simplifies board-level integration across multiple voltage standards.
- Robust clocking options: Family clock-management features including PLLs and multiple global clocks support complex timing architectures.
- Industrial-grade operation: Specified for −40 °C to 100 °C operation, suitable for industrial environments.
- Compact BGA package: 672-ball BGA (supplier 672-FBGA, 27×27) supports high I/O counts in a surface-mount form factor.
Why Choose EP20K1000EFI672-2X?
The EP20K1000EFI672-2X combines a high logic element count with embedded memory and extensive I/O to address designs that require on-chip buffering, dense logic integration and flexible interfacing. Its MultiCore APEX architecture and family clocking features provide architectural building blocks for SOPC-style system integration.
This industrial-grade 672-BBGA FPGA is suited to engineering teams building memory‑intensive or I/O-heavy designs who need a high-density, RoHS-compliant programmable device with a defined core supply range and extended operating temperature.
If you would like pricing or availability information, request a quote or submit a quote for the EP20K1000EFI672-2X.

Date Founded: 1968
Headquarters: Santa Clara, California, USA
Employees: 130,000+
Revenue: $54.23 Billion
Certifications and Memberships: ISO9001:2015, ISO14001:2015, ISO17025:2017, ISO27001:2022, ISO45001:2018, ISO50001:2018